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Date:   Tue, 2 Aug 2022 19:47:59 +0100
From:   Mark Brown <broonie@kernel.org>
To:     Sudip Mukherjee <sudip.mukherjee@sifive.com>
Cc:     Serge Semin <fancer.lancer@gmail.com>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        greentime.hu@sifive.com, jude.onyenegecha@sifive.com,
        william.salmon@sifive.com, adnan.chowdhury@sifive.com,
        ben.dooks@sifive.com, linux-spi@vger.kernel.org,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
        jeegar.lakhani@sifive.com
Subject: Re: [PATCH 01/11] spi: dw: define capability for enhanced spi
Message-ID: <YulxX3Zo168cWhwP@sirena.org.uk>
References: <20220802175755.6530-1-sudip.mukherjee@sifive.com>
 <20220802175755.6530-2-sudip.mukherjee@sifive.com>
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On Tue, Aug 02, 2022 at 06:57:45PM +0100, Sudip Mukherjee wrote:

> Some Synopsys SSI controllers support enhanced SPI which includes
> Dual mode, Quad mode and Octal mode. Define the capability and mention
> it in the controller supported modes.

> +#define DW_SPI_CAP_EXT_SPI		BIT(2)

This isn't at all descriptive, it'd be better to have a capability bit
for the various multi-line data modes (or possibly individual bits for
them, though board setup will stop us using things that aren't supported
in a given design anyway so it's a bit redundant) - that'd be a lot
clearer and avoid confusion further down the line when some other
feature gets added.

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