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Date:   Thu, 04 Aug 2022 09:53:15 +0200
From:   Michael Walle <michael@walle.cc>
To:     Philipp Zabel <p.zabel@pengutronix.de>
Cc:     Steen Hegelund <steen.hegelund@microchip.com>,
        linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        Lars Povlsen <lars.povlsen@microchip.com>,
        =?UTF-8?Q?Cl=C3=A9ment_L=C3=A9ge?= =?UTF-8?Q?r?= 
        <clement.leger@bootlin.com>,
        Claudiu Beznea <claudiu.beznea@microchip.com>,
        Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>,
        Horatiu Vultur <horatiu.vultur@microchip.com>
Subject: Re: [PATCH] Revert "reset: microchip-sparx5: allow building as a
 module"
In-Reply-To: <4a12868d0bffbaef9912fbc54e5998e0c50bccf6.camel@pengutronix.de>
References: <20220713084010.168720-1-p.zabel@pengutronix.de>
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 <ba905391f3258c2d780677e09e4f89192df7bc31.camel@microchip.com>
 <595347d292ee31a9f0de031d6349f44e@walle.cc>
 <4a12868d0bffbaef9912fbc54e5998e0c50bccf6.camel@pengutronix.de>
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Am 2022-07-13 14:08, schrieb Philipp Zabel:
> Hi,
> 
> On Mi, 2022-07-13 at 11:52 +0200, Michael Walle wrote:
>> [+ Horatiu, I missed you earlier, sorry]
>> 
>> Hi Steen,
>> 
>> Am 2022-07-13 11:40, schrieb Steen Hegelund:
>> > I am afraid that the exact list of affected modules is not available,
>> > so using the
>> > RESET_PROT_STAT.SYS_RST_PROT_VCORE bit is the best known way of
>> > resetting as much as possible, and
>> > still continue execution.
>> 
>> Mh, you are designing that chip (at least the LAN966x) no? Shouldn't
>> that information be available anywhere at Microchip? ;)
>> 
>> Anyway, it looks like almost the whole chip is reset
>> except some minor things. So the driver has actually a
>> wrong name. Until recently only the switch driver was the
>> sole user of it (at least on the lan966x). So, my question
>> remains, is this correct? I mean the switch driver says,
>> "reset the switch core", but what actually happens is that
>> the the entire SoC except the CPU and maybe the io mux is reset.
>> What about the watchdog for example? Will that be reset, too?
> 
> If [1-3] are to be trusted, RESET_PROT_STAT[VCORE_RST_PROT_WDT], which
> protects the watchdog from soft reset, is not set by default. So yes?
> 
> There are also AMBA, PCIe, PDBG protection bits against Vcore soft
> reset in this register, depending on the platform.
> 
> [1] 
> https://microchip-ung.github.io/sparx-5_reginfo/reginfo_sparx-5.html?select=cpu,cpu_regs,reset_prot_stat
> [2] 
> https://microchip-ung.github.io/lan9662_reginfo/reginfo_LAN9662.html?select=cpu,cpu_regs,reset_prot_stat
> [3] 
> https://microchip-ung.github.io/lan9668_reginfo/reginfo_LAN9668.html?select=cpu,cpu_regs,reset_prot_stat

Ping. any news here?

-michael