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Date:   Thu, 4 Aug 2022 12:27:57 +0200
From:   Marco Felsch <m.felsch@pengutronix.de>
To:     Dave Stevenson <dave.stevenson@raspberrypi.com>
Cc:     Adam Ford <aford173@gmail.com>,
        Neil Armstrong <narmstrong@baylibre.com>,
        David Airlie <airlied@linux.ie>,
        dri-devel <dri-devel@lists.freedesktop.org>,
        Laurent Pinchart <Laurent.pinchart@ideasonboard.com>,
        Andrzej Hajda <andrzej.hajda@intel.com>,
        Marek Szyprowski <m.szyprowski@samsung.com>,
        Marek Vasut <marex@denx.de>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        Jagan Teki <jagan@amarulasolutions.com>, robert.chiras@nxp.com,
        laurentiu.palcu@nxp.com, NXP Linux Team <linux-imx@nxp.com>,
        Jonas Karlman <jonas@kwiboo.se>,
        Sascha Hauer <s.hauer@pengutronix.de>,
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        Shawn Guo <shawnguo@kernel.org>
Subject: Re: imx8mm lcdif->dsi->adv7535 no video, no errors
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On 22-08-03, Dave Stevenson wrote:
> On Wed, 3 Aug 2022 at 13:31, Adam Ford <aford173@gmail.com> wrote:

...

> > Mine also states the DSI source needs to provide correct video timing
> > with start and stop sync packets.
> >
> > If I remember correctly, it seemed like Marek V wanted the hard coded
> > samsung,burst-clock-frequency to go away so the clock frequency could
> > be set dynamically.
> 
> I've never worked with Exynos or imx8, but my view would be that
> samsung,burst-clock-frequency should only be used if
> MIPI_DSI_MODE_VIDEO_BURST is set in the mode_flags (it isn't for
> adv7533/5).

Some notes on that. The samsung,burst-clock-frequency is the
hs-bit-clock-rate which is twice the dsi-clock-rate. This has nothing to
do with the MIPI_DSI_MODE_VIDEO_BURST.

> Without that flag the DSI link frequency should be running at the rate
> defined by the mode clock, number of lanes, bpp, etc.

IMHO the DSI link have only to guarantee the bandwidth is sufficient for
the mode.

> From the DSI spec (v 1.1 section 8.11.1):
> "Non-Burst Mode with Sync Pulses – enables the peripheral to
> accurately reconstruct original video timing, including sync pulse
> widths."
> "RGB pixel packets are time-compressed, leaving more time during a
> scan line for LP mode (saving power) or for multiplexing other
> transmissions onto the DSI link."
> How can the peripheral reconstruct the video timing off a quirky link frequency?

If the ADV couldn't reconstruct the sync signals, then we should not get
any mode working but we get the 1080P mode working.

> Unless the Exynos DSIM_CONFIG_REG register bit DSIM_BURST_MODE [1]
> reconfigures the clock setup of the DSI block, then I don't see how
> the Exynos driver can follow the DSI spec in that regard.

Why do you think that the Exynos driver isn't following the spec? We
configure the host into video mode with sync signals which is working
for the 1080P mode.

Regards,
  Marco