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[2620:137:e000::1:20]) by mx.google.com with ESMTP id 18-20020a630e52000000b0041a4c29e7a3si1481724pgo.272.2022.08.04.07.23.31; Thu, 04 Aug 2022 07:23:46 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20210112 header.b=QSKMyIcY; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239861AbiHDOBq (ORCPT + 99 others); Thu, 4 Aug 2022 10:01:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57062 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235162AbiHDOBo (ORCPT ); Thu, 4 Aug 2022 10:01:44 -0400 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF20E1C128; Thu, 4 Aug 2022 07:01:43 -0700 (PDT) Received: by mail-lf1-x12c.google.com with SMTP id a9so18139695lfm.12; Thu, 04 Aug 2022 07:01:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc; bh=JaMe6j4fYY9HfpaAc4kq+NXQn/JQWze+bei2ZzmND0I=; b=QSKMyIcYM/epVOjE3xPWm4g7Fax7lyHTwJQV6QgjlHcsv/cO9qjGpwNheGqSJgDhfx emrqTQFK2mDSQ4NpoATQJCLyuB2zWwcio2s5WMthC2HEW4OqjfATYWffLDBA8Z5QtKkZ EdrQwKuI1Rigsooo83kdn/f1PCIPbrD2BeU9N0Ide6iYB/yq/yopo5SIbE4Bzvo2NpxE 8pavzD0D8zzoVWA1GgymHDDf+Lv4icd/sdUYt/dTojG8d5rqwxgNhQtDboOQP+0F3yy1 vW6yfJMOZl/AXpGWD0W9//zTRIQ+q+NfA0h4Ybvt7EaW+eLXglfH6Vb3cto0ZC1/rGyw T/MQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc; bh=JaMe6j4fYY9HfpaAc4kq+NXQn/JQWze+bei2ZzmND0I=; b=U4EhkMyn/NpqG3NKFpACQtE5Usb5SPIK/ICMSr4meFQxUuAA/p9R8Lgsf+vTF0Pbok q3F2P4uZbep8NP14lCW2EOx/Jc/PafM4bPdIcuNde1+Ub8UgAhm4pNvQJnYWcKJiQQ1J 8EzTSwgrq7GAHxe1PBnyc/EcAXZjoQ+4Opb7EmH3mumf067gSl0ylCFrT+kVNBdWhAsX hCqKaskt7hu8xOfbEex38hgBXWWf+UJWIjhQwIx8/EhcmxoFsS3YcQvZrf8g0IjOub2J J2O9r/sJpjpe1yxWe01cn59Cp9NC7WKQfqUJn54TsiwOjjDMkLluxuxADciaT9nKNaMa U00g== X-Gm-Message-State: ACgBeo0O6nFMuwWooNnrPrAq7SvBrHzoJKQIOKPIsLz5Ad/6UK2uLJw+ FsCsPa8KKauXlmYUxX66+52QdlzHCJgHFlJhMVw= X-Received: by 2002:a05:6512:692:b0:48a:f5fb:188c with SMTP id t18-20020a056512069200b0048af5fb188cmr816276lfe.111.1659621702117; Thu, 04 Aug 2022 07:01:42 -0700 (PDT) MIME-Version: 1.0 References: <20220711123519.217219-1-tmaimon77@gmail.com> <20220711123519.217219-5-tmaimon77@gmail.com> <20220711195544.70A30C34115@smtp.kernel.org> <20220718191454.5B5D3C341C0@smtp.kernel.org> <20220723030226.8E43CC341C6@smtp.kernel.org> <20220729225603.12528C433D6@smtp.kernel.org> In-Reply-To: <20220729225603.12528C433D6@smtp.kernel.org> From: Tomer Maimon Date: Thu, 4 Aug 2022 17:01:30 +0300 Message-ID: Subject: Re: [PATCH v8 04/16] clk: npcm8xx: add clock controller To: Stephen Boyd Cc: Arnd Bergmann , Avi Fishman , Benjamin Fair , Biju Das , Bjorn Andersson , Catalin Marinas , Daniel Lezcano , Geert Uytterhoeven , Greg KH , =?UTF-8?Q?Jonathan_Neusch=C3=A4fer?= , Jiri Slaby , Joel Stanley , Krzysztof Kozlowski , Guenter Roeck , Lubomir Rintel , Marcel Ziswiler , Michael Turquette , Nobuhiro Iwamatsu , Olof Johansson , Philipp Zabel , Robert Hancock , Rob Herring , Shawn Guo , Tali Perry , Thomas G leixner , Patrick Venture , Vinod Koul , Will Deacon , Wim Van Sebroeck , Nancy Yuen , devicetree , Linux Kernel Mailing List , linux-clk , SERIAL DRIVERS , LINUXWATCHDOG , Linux ARM Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, 30 Jul 2022 at 01:56, Stephen Boyd wrote: > > Quoting Tomer Maimon (2022-07-24 02:06:54) > > On Sat, 23 Jul 2022 at 06:02, Stephen Boyd wrote: > > > Furthermore, in DT, reg properties aren't supposed to overlap. When that > > > happens it usually indicates the DT is being written to describe driver > > > structure instead of the IP blocks that are delivered by the hardware > > > engineer. In this case it sounds like a combined clk and reset IP block > > > because they piled all the SoC glue stuff into a register range. Are > > > there more features in this IO range? > > > > No, this range only combined the reset and clock together, but it > > combined in a way that we cannot split it to two or even three > > different registers... > > Because it is jumbled in some range? Yes. > > > > > I do see a way to combine the clock and the reset driver, the NPCM > > reset driver is serving other NPCM BMC's. > > Should we use regmap to handle the clock registers instead of ioremap? > > Sure? Using regmap or not looks like a parallel discussion. How does it > help use platform APIs? I mean to use regmap API instead of platform API for handing the clock and reset registers. the regmap API gives only one user access to R/W (lock). I will be happy to get more suggestions, on how should we solve this situation. Thanks, Tomer