Received: by 2002:a05:6358:e9c4:b0:b2:91dc:71ab with SMTP id hc4csp1378263rwb; Fri, 5 Aug 2022 00:19:54 -0700 (PDT) X-Google-Smtp-Source: AA6agR6IogwBV3yJkiPASBx/lv6uwZd5RaeNAKP7+hWcQKyGE0o6SyQWB4UJZKsqXvS7Z2pDroup X-Received: by 2002:aa7:8241:0:b0:52e:9544:199 with SMTP id e1-20020aa78241000000b0052e95440199mr4750648pfn.55.1659683994439; Fri, 05 Aug 2022 00:19:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1659683994; cv=none; d=google.com; s=arc-20160816; b=lHoRlV/fYcdQxSwkgHj+yqC542NLi5XKSdGfOmv6W83wLwlBYQuO0FJ3REyLe4GBOt h74O9EitF8w3b3q67uE1gR0bdNEMxaZ/kWC0VSk0ubQj7pz3+wuj8Qm1GACFXBcteuG3 EtDoOwnU4rvqtYiVlB7dzvbfkUxgK4yaQr5PguS6mlvaKxNFlwGItMh+PkMTmq9uze/c TxMgupf+4wPPyJ2p1UEdM/DbBgR5v7XGCJgfb2Q9RJXl8ZlzWAPeEQyY724MiZVdIJ5j RR0qcbTCHw2TbpK8I81isDwc9DlBt9EAqia9+VGSOLvtYmfJY7N+4rzNLYgLtQk4nIOw NZYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=llpyykUzhmZPyJbNXq2PVzSpCD38H+nroK0R1Jlvmd4=; b=Dpf23wUK5gLmqdssshMWabneWdvKjwuTDwoMe4obsUPWxG6U4gVdesjGZdFOiC2OSC o1v+PRRDOuS+kM3qcu9H/0YbKdAwmHoTDOQRILTiRHOLP0rUP/FQ0Kzuk+l22jh1CY0M 3yNi2oSkhZjMz7w5dCSJ9DB2cbjvQxTw1yWkcPWLIzzk/bdQAfnmmjqYg1KyS3Adp4Bk SnocJIFv/IKB6tbikHzRdKhNPZi4wIDm5uZzzukFXeqM+G6LdpVEWkRfeofJQ9BJu3hj CSnRudTF/kmA96GxU8y77Ao90uxs6H0M/Af0wdKcdabAcEWCQ9nuOCtww4IqySuwfXpf JZ1g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id q12-20020a170902dacc00b0016f168b4368si3868002plx.547.2022.08.05.00.19.41; Fri, 05 Aug 2022 00:19:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240262AbiHEHO6 (ORCPT + 99 others); Fri, 5 Aug 2022 03:14:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50114 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240243AbiHEHOu (ORCPT ); Fri, 5 Aug 2022 03:14:50 -0400 Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E69FB336; Fri, 5 Aug 2022 00:14:46 -0700 (PDT) Received: from droid01-xa.amlogic.com (10.88.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.9; Fri, 5 Aug 2022 15:14:38 +0800 From: Jiucheng Xu To: , , , CC: Rob Herring , Krzysztof Kozlowski , Will Deacon , Mark Rutland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Chris Healy , Jiucheng Xu Subject: [PATCH v4 3/4] arm64: dts: meson: Add DDR PMU node Date: Fri, 5 Aug 2022 15:14:25 +0800 Message-ID: <20220805071426.2598818-3-jiucheng.xu@amlogic.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220805071426.2598818-1-jiucheng.xu@amlogic.com> References: <20220805071426.2598818-1-jiucheng.xu@amlogic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.88.11.200] X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DDR PMU device node for G12 series SoC Signed-off-by: Jiucheng Xu --- Changes v3 -> v4: - No change Changes v2 -> v3: - No change Changes v1 -> v2: - Remove model, dmc_nr, chann_nr properties - Add g12a-ddr-pmu, g12b-ddr-pmu, sm1-ddr-pmu compatibles as identifier --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 7 +++++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 4 ++++ arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 4 ++++ arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 ++++ 4 files changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index 45947c1031c4..7e556fe575be 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -2146,6 +2146,13 @@ hdmi_tx_out: endpoint { }; }; + ddr_pmu: ddr_pmu@ff638000 { + compatible = "amlogic,g12-ddr-pmu"; + reg = <0x0 0xff638000 0x0 0x100 + 0x0 0xff638c00 0x0 0x100>; + interrupts = ; + }; + gic: interrupt-controller@ffc01000 { compatible = "arm,gic-400"; reg = <0x0 0xffc01000 0 0x1000>, diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index fb0ab27d1f64..4a32e081e70e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -133,3 +133,7 @@ map1 { }; }; }; + +&ddr_pmu { + compatible = "amlogic,g12a-ddr-pmu"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi index ee8fcae9f9f0..d91eca5a9afc 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi @@ -139,3 +139,7 @@ map1 { &mali { dma-coherent; }; + +&ddr_pmu { + compatible = "amlogic,g12b-ddr-pmu"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi index 80737731af3f..7d62c661fde5 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -543,3 +543,7 @@ &vpu { &usb { power-domains = <&pwrc PWRC_SM1_USB_ID>; }; + +&ddr_pmu { + compatible = "amlogic,sm1-ddr-pmu"; +}; -- 2.25.1