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Message-ID: <62f158b0.050a0220.9281c.1da3@mx.google.com>
Date:   Mon, 8 Aug 2022 15:35:42 +0200
From:   Christian Marangi <ansuelsmth@gmail.com>
To:     Konrad Dybcio <konrad.dybcio@somainline.org>
Cc:     Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] ARM: dts: qcom: ipq8064: add v2 dtsi variant
References: <20220718161826.4943-1-ansuelsmth@gmail.com>
 <62efbb68.170a0220.88a00.8207@mx.google.com>
 <3515103e-8663-1df9-a184-a383cc0d6aa9@somainline.org>
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On Mon, Aug 08, 2022 at 12:55:36PM +0200, Konrad Dybcio wrote:
> 
> 
> On 7.08.2022 15:00, Christian Marangi wrote:
> > On Mon, Jul 18, 2022 at 06:18:24PM +0200, Christian Marangi wrote:
> >> Add ipq8064-v2.0 dtsi variant that differ from original ipq8064 SoC for
> >> some additional pcie, sata and usb configuration values, additional
> >> reserved memory and serial output.
> >>
> >> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
> > 
> > Any news for this?Unless Qualcomm naming was different back then, you should simply merge
> all of these changes into ipq8064.dtsi, as v1 is often the pre-production,
> internal chip revision and only the last one (or the last and second-last)
> are shipped in production devices.
>

Mhh, this is not the case, there are dev board based on v1 and we also
have some device based on v1 (that have some difference for pci and usb)
One example is a Netgear r7500 where we have 2 revision one based on
ipq8064-v1.0 and one based on ipq8064-v2.0.

> > 
> >> ---
> >>  .../boot/dts/qcom-ipq8064-v2.0-smb208.dtsi    | 37 ++++++++++
> >>  arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi      | 69 +++++++++++++++++++
> >>  2 files changed, 106 insertions(+)
> >>  create mode 100644 arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
> >>  create mode 100644 arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
> >>
> >> diff --git a/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi b/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
> >> new file mode 100644
> >> index 000000000000..0442580b22de
> >> --- /dev/null
> >> +++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0-smb208.dtsi
> >> @@ -0,0 +1,37 @@
> >> +// SPDX-License-Identifier: GPL-2.0
> >> +
> >> +#include "qcom-ipq8064-v2.0.dtsi"
> >> +
> >> +&rpm {
> >> +	smb208_regulators: regulators {
> >> +		compatible = "qcom,rpm-smb208-regulators";
> >> +
> >> +		smb208_s1a: s1a {
> >> +			regulator-min-microvolt = <1050000>;
> >> +			regulator-max-microvolt = <1150000>;
> >> +
> >> +			qcom,switch-mode-frequency = <1200000>;
> >> +		};
> >> +
> >> +		smb208_s1b: s1b {
> >> +			regulator-min-microvolt = <1050000>;
> >> +			regulator-max-microvolt = <1150000>;
> >> +
> >> +			qcom,switch-mode-frequency = <1200000>;
> >> +		};
> >> +
> >> +		smb208_s2a: s2a {
> >> +			regulator-min-microvolt = < 800000>;
> >> +			regulator-max-microvolt = <1250000>;
> >> +
> >> +			qcom,switch-mode-frequency = <1200000>;
> >> +		};
> >> +
> >> +		smb208_s2b: s2b {
> >> +			regulator-min-microvolt = < 800000>;
> >> +			regulator-max-microvolt = <1250000>;
> >> +
> >> +			qcom,switch-mode-frequency = <1200000>;
> >> +		};
> >> +	};
> >> +};
> >> diff --git a/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
> >> new file mode 100644
> >> index 000000000000..2f117d576daf
> >> --- /dev/null
> >> +++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
> >> @@ -0,0 +1,69 @@
> >> +// SPDX-License-Identifier: GPL-2.0
> >> +
> >> +#include "qcom-ipq8064.dtsi"
> >> +
> >> +/ {
> >> +	model = "Qualcomm Technologies, Inc. IPQ8064-v2.0";
> >> +
> >> +	aliases {
> >> +		serial0 = &gsbi4_serial;
> >> +	};
> >> +
> >> +	chosen {
> >> +		stdout-path = "serial0:115200n8";
> >> +	};
> >> +
> >> +	reserved-memory {
> >> +		#address-cells = <1>;
> >> +		#size-cells = <1>;
> >> +		ranges;
> >> +
> >> +		rsvd@41200000 {
> >> +			reg = <0x41200000 0x300000>;
> >> +			no-map;
> >> +		};
> >> +	};
> >> +};
> >> +
> >> +&gsbi4 {
> >> +	qcom,mode = <GSBI_PROT_I2C_UART>;
> >> +	status = "okay";
> >> +
> >> +	serial@16340000 {
> >> +		status = "okay";
> >> +	};
> >> +	/*
> >> +	 * The i2c device on gsbi4 should not be enabled.
> >> +	 * On ipq806x designs gsbi4 i2c is meant for exclusive
> >> +	 * RPM usage. Turning this on in kernel manifests as
> >> +	 * i2c failure for the RPM.
> >> +	 */
> >> +};
> >> +
> >> +&pcie0 {
> >> +	compatible = "qcom,pcie-ipq8064-v2";
> >> +};
> >> +
> >> +&pcie1 {
> >> +	compatible = "qcom,pcie-ipq8064-v2";
> >> +};
> >> +
> >> +&pcie2 {
> >> +	compatible = "qcom,pcie-ipq8064-v2";
> >> +};
> >> +
> >> +&sata {
> >> +	ports-implemented = <0x1>;
> >> +};
> >> +
> >> +&ss_phy_0 {
> >> +	qcom,rx-eq = <2>;
> >> +	qcom,tx-deamp_3_5db = <32>;
> >> +	qcom,mpll = <5>;
> >> +};
> >> +
> >> +&ss_phy_1 {
> >> +	qcom,rx-eq = <2>;
> >> +	qcom,tx-deamp_3_5db = <32>;
> >> +	qcom,mpll = <5>;
> >> +};
> >> -- 
> >> 2.36.1
> >>
> > 

-- 
	Ansuel