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Message-ID: <b15184d6-c9e7-d042-621b-ef4ccd3c87ba@linaro.org>
Date:   Tue, 9 Aug 2022 08:29:15 +0300
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Subject: Re: [PATCH 1/3] dt-bindings: spi: stm32: Add st,dual-flash property
 in st,stm32-qspi.yaml
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From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To:     Patrice CHOTARD <patrice.chotard@foss.st.com>,
        Mark Brown <broonie@kernel.org>,
        Alexandre Torgue <alexandre.torgue@foss.st.com>,
        robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org
Cc:     linux-spi@vger.kernel.org,
        linux-stm32@st-md-mailman.stormreply.com,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        christophe.kerello@foss.st.com, devicetree@vger.kernel.org
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On 09/08/2022 07:18, Krzysztof Kozlowski wrote:
> On 08/08/2022 19:08, Patrice CHOTARD wrote:
>> Hi Krzystof
>>
>> On 8/8/22 11:01, Krzysztof Kozlowski wrote:
>>> On 08/08/2022 10:40, patrice.chotard@foss.st.com wrote:
>>>> From: Patrice Chotard <patrice.chotard@foss.st.com>
>>>>
>>>> Add new property st,dual-flash which allows to use the QSPI interface as a
>>>> communication channel using up to 8 qspi line.
>>>> This mode can only be used if cs-gpios property is defined.
>>>>
>>>> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
>>>> ---
>>>>  Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml | 8 ++++++++
>>>>  1 file changed, 8 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
>>>> index 6ec6f556182f..5e4f9109799e 100644
>>>> --- a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
>>>> +++ b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
>>>> @@ -46,6 +46,14 @@ properties:
>>>>        - const: tx
>>>>        - const: rx
>>>>  
>>>> +  st,dual-flash:
>>>> +    type: boolean
>>>> +    description:
>>>> +      Allows to use 8 data lines in case cs-gpios property is defined.
>>>
>>> It's named dual-flash, but what if you want to use QSPI to connect for
>>> example to FPGA?
>>>
>>> Also how is this related to parallel-memories property?
>>
>> I called it "dual-flash" simply because it enable the dual flash feature of the QSPI block (bit CR_DFM : Dual Flash Mode)
>> which allows to use the 8 lines simultaneously of our dual QSPI block.
> 
> And how is it related to existing parallel-memories property?

Maybe I was not specific enough, so let me rephrase - we have already
parallel-memories property. How this one is different (to justify the
new property)? Is just one memory connected in your case to QSPI over 8
data lines?

Best regards,
Krzysztof