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From:   Thomas Gleixner <tglx@linutronix.de>
To:     Daniel Sneddon <daniel.sneddon@linux.intel.com>,
        Dave Hansen <dave.hansen@intel.com>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        Dave Hansen <dave.hansen@linux.intel.com>, x86@kernel.org,
        "Shutemov, Kirill" <kirill.shutemov@intel.com>,
        "Huang, Kai" <kai.huang@intel.com>
Cc:     "H. Peter Anvin" <hpa@zytor.com>, linux-kernel@vger.kernel.org,
        "Gomez Iglesias, Antonio" <antonio.gomez.iglesias@intel.com>,
        Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Subject: Re: [PATCH] x86/apic: Don't disable x2APIC if locked
In-Reply-To: <1d81ef6a-7505-fc13-ecbf-f3ca7a6fbfce@linux.intel.com>
References: <20220809234000.783284-1-daniel.sneddon@linux.intel.com>
 <d6ffb489-7024-ff74-bd2f-d1e06573bb82@intel.com>
 <238ea612-5a25-9323-b31f-0a14493db2f7@linux.intel.com>
 <d4bcb22e-224c-d256-cb93-3ff6ed89a7d0@intel.com>
 <341ea6e9-d8f3-ee7a-6794-67408abbf047@linux.intel.com>
 <87r11nu52l.ffs@tglx>
 <83a0d220-1872-caba-4e7e-b6a366655cf2@linux.intel.com>
 <ba80b303-31bf-d44a-b05d-5c0f83038798@intel.com>
 <bff78ad9-57d8-ca82-cc75-0b7e5024116d@linux.intel.com>
 <9888a920-37b8-9a1f-b887-6630492955c6@intel.com>
 <1d81ef6a-7505-fc13-ecbf-f3ca7a6fbfce@linux.intel.com>
Date:   Thu, 11 Aug 2022 02:38:38 +0200
Message-ID: <87lervty0h.ffs@tglx>
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On Wed, Aug 10 2022 at 17:01, Daniel Sneddon wrote:
> On 8/10/22 16:44, Dave Hansen wrote:
>> On 8/10/22 16:38, Daniel Sneddon wrote:
>>>>
>>>> config INTEL_TDX_GUEST
>>>>         bool "Intel TDX (Trust Domain Extensions) - Guest Support"
>>>>         depends on X86_64 && CPU_SUP_INTEL
>>>>         depends on X86_X2APIC
>>> So I got some more input.  SPR and newer will lock the APIC.  
>> 
>> Could you get a _little_ more clarity on this, please?  Exactly how and
>> when will it be locked?  What does the BIOS writer's guide say?  Will
>> there be an explicit x2APIC lock option?  Or, will it be implicitly
>> locked when SGX or TDX is enabled?
>
> The BIOS doesn't explicitly lock the APIC.  The APIC will be locked if X2APIC
> mode is enabled when the BIOS does an MCHECK.  X2APIC mode will be enabled if
> SGX or TDX are enabled.  So when exactly does the BIOS do an MCHECK?  That I'll
> have to get clarification on.

Sorry, this is uncomprehensible word salad and none of this makes any
sense at all to me.

Can you please explain this in comprehensible sentences understandable
by mere mortals?

Thanks,

        tglx