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Thu, 11 Aug 2022 07:31:22 -0500 From: Sandipan Das To: , , CC: , , , , , , , , , , , , , , , Subject: [PATCH 02/13] perf/x86/amd/core: Refactor branch attributes Date: Thu, 11 Aug 2022 17:59:50 +0530 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: e56ebe07-d410-4d5b-b2fa-08da7b956a35 X-MS-TrafficTypeDiagnostic: MN2PR12MB3536:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: e4POl/dOAikrykOfyNkC43sfZdpW2bK2GeIDU4FUc3NcZaIedFo2/3ON9Lp/lMIgU7z1raaoI0gI4S+kE5wHbXjQfd+lCQjdVTj9UIv6B2QPWqtZiHYBsapv72mxL0jPqHc7ZHH2rGrR9wYWvxzw7T2qacEABuJ1Ocs2MCtBF3eDgAuVxXdGyueaVFuGTqsUW5UViMA6KebHV0HXnEAoUeF6abhfY3lBxKXvVNMVa7Uzjz8QgktSPrjn5uDQxnyFtkLc8rqcm+7BH4kH35LIOYkSgvJhSb1DVvtx9PDWiQZHxScO1/y+OdCUIk061X0jLoHtUCQGuXivrkoKlBLjyRx8GQ+3GygNhNfGKpeR87kmeVwK6oXUGEwusrjz0HQuy5WCUsfdC00/pPWcQovXgI2NHlSUiA77P62Cc5U3gIqWIgPne3ex6f+Hoep/7f6XVG4PcAntdP6KCVpMMaDbh0Hc7tQbbMmXFWN4toH99SXqTUSyOJ7P60jDeaU8cdpH0JG9yA0EfzcG0QhY3TlSpoT570DaBLxctFRXJwpnb5pMLlSIJ97/30T9h328uTyCh/fLxWo2c0yuqGPYkqIYU+npHvVCmli69Ld92PoO0iA3e514zBjnfDrZlCOlSJBg5wAcsYviSU4RMjZyDIzWY4XBDO/zOg9HMH9h0kOXIatI+8AzYSEZqHY3gYc6/Eb6E1cw+q+BaO5ZTUw23ez4BZZCfE3Xmy4c7YCR93hxteg++R0TSnA+PVqmlEbzCiap1s0IUY04LDA4gXH+7Ou0nw16gmULfoPLseeem9MNRZ+0YiwOhWKcwPvemxC1kSuWNp4bnnIB6qYHek+Ws1yaOg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(136003)(346002)(396003)(376002)(39860400002)(40470700004)(36840700001)(46966006)(110136005)(54906003)(316002)(41300700001)(478600001)(40480700001)(82310400005)(70586007)(7416002)(2906002)(4326008)(8676002)(44832011)(70206006)(5660300002)(8936002)(40460700003)(83380400001)(356005)(81166007)(86362001)(36860700001)(426003)(2616005)(336012)(186003)(82740400003)(16526019)(47076005)(6666004)(26005)(36756003)(7696005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 Aug 2022 12:31:28.6875 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e56ebe07-d410-4d5b-b2fa-08da7b956a35 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT027.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB3536 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org AMD processors that are capable of recording branches support either Branch Sampling (BRS) or Last Branch Record (LBR). In preparation for adding Last Branch Record Extension Version 2 (LbrExtV2) support, reuse the "branches" capability to advertise information about both BRS and LBR but make the "branch-brs" event exclusive to Family 19h processors that support BRS. Signed-off-by: Sandipan Das --- arch/x86/events/amd/core.c | 25 +++++++++++++++++++------ 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c index e32a27899e11..2f524cf84528 100644 --- a/arch/x86/events/amd/core.c +++ b/arch/x86/events/amd/core.c @@ -1247,23 +1247,25 @@ static ssize_t branches_show(struct device *cdev, static DEVICE_ATTR_RO(branches); -static struct attribute *amd_pmu_brs_attrs[] = { +static struct attribute *amd_pmu_branches_attrs[] = { &dev_attr_branches.attr, NULL, }; static umode_t -amd_brs_is_visible(struct kobject *kobj, struct attribute *attr, int i) +amd_branches_is_visible(struct kobject *kobj, struct attribute *attr, int i) { return x86_pmu.lbr_nr ? attr->mode : 0; } -static struct attribute_group group_caps_amd_brs = { +static struct attribute_group group_caps_amd_branches = { .name = "caps", - .attrs = amd_pmu_brs_attrs, - .is_visible = amd_brs_is_visible, + .attrs = amd_pmu_branches_attrs, + .is_visible = amd_branches_is_visible, }; +#ifdef CONFIG_PERF_EVENTS_AMD_BRS + EVENT_ATTR_STR(branch-brs, amd_branch_brs, "event=" __stringify(AMD_FAM19H_BRS_EVENT)"\n"); @@ -1272,15 +1274,26 @@ static struct attribute *amd_brs_events_attrs[] = { NULL, }; +static umode_t +amd_brs_is_visible(struct kobject *kobj, struct attribute *attr, int i) +{ + return static_cpu_has(X86_FEATURE_BRS) && x86_pmu.lbr_nr ? + attr->mode : 0; +} + static struct attribute_group group_events_amd_brs = { .name = "events", .attrs = amd_brs_events_attrs, .is_visible = amd_brs_is_visible, }; +#endif /* CONFIG_PERF_EVENTS_AMD_BRS */ + static const struct attribute_group *amd_attr_update[] = { - &group_caps_amd_brs, + &group_caps_amd_branches, +#ifdef CONFIG_PERF_EVENTS_AMD_BRS &group_events_amd_brs, +#endif NULL, }; -- 2.34.1