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Date:   Thu, 11 Aug 2022 12:53:56 -0700
From:   "H. Peter Anvin" <hpa@zytor.com>
To:     Adam Dunlap <acdunlap@google.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        Dave Hansen <dave.hansen@linux.intel.com>, x86@kernel.org,
        Nathan Chancellor <nathan@kernel.org>,
        Nick Desaulniers <ndesaulniers@google.com>,
        Tom Rix <trix@redhat.com>,
        "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
        Sean Christopherson <seanjc@google.com>,
        Kuppuswamy Sathyanarayanan 
        <sathyanarayanan.kuppuswamy@linux.intel.com>,
        Andi Kleen <ak@linux.intel.com>,
        Ben Dooks <ben-linux@fluff.org>, linux-kernel@vger.kernel.org,
        llvm@lists.linux.dev
CC:     Jacob Xu <jacobhxu@google.com>, Alper Gun <alpergun@google.com>,
        Marc Orr <marcorr@google.com>
Subject: Re: [PATCH] x86/asm: Force native_apic_mem_read to use mov
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On August 11, 2022 11:00:10 AM PDT, Adam Dunlap <acdunlap@google=2Ecom> wro=
te:
>Previously, when compiled with clang, native_apic_mem_read gets inlined
>into __xapic_wait_icr_idle and optimized to a testl instruction=2E When
>run in a VM with SEV-ES enabled, it attempts to emulate this
>instruction, but the emulator does not support it=2E Instead, use inline
>assembly to force native_apic_mem_read to use the mov instruction which
>is supported by the emulator=2E
>
>Signed-off-by: Adam Dunlap <acdunlap@google=2Ecom>
>Reviewed-by: Marc Orr <marcorr@google=2Ecom>
>Reviewed-by: Jacob Xu <jacobhxu@google=2Ecom>
>---
> arch/x86/include/asm/apic=2Eh | 13 ++++++++++++-
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
>diff --git a/arch/x86/include/asm/apic=2Eh b/arch/x86/include/asm/apic=2E=
h
>index 3415321c8240=2E=2E281db79e76a9 100644
>--- a/arch/x86/include/asm/apic=2Eh
>+++ b/arch/x86/include/asm/apic=2Eh
>@@ -109,7 +109,18 @@ static inline void native_apic_mem_write(u32 reg, u3=
2 v)
>=20
> static inline u32 native_apic_mem_read(u32 reg)
> {
>-	return *((volatile u32 *)(APIC_BASE + reg));
>+	volatile u32 *addr =3D (volatile u32 *)(APIC_BASE + reg);
>+	u32 out;
>+
>+	/*
>+	 * Functionally, what we want to do is simply return *addr=2E However,
>+	 * this accesses an MMIO which may need to be emulated in some cases=2E
>+	 * The emulator doesn't necessarily support all instructions, so we
>+	 * force the read from addr to use a mov instruction=2E
>+	 */
>+	asm_inline("movl %1, %0" : "=3Dr"(out) : "m"(*addr));
>+
>+	return out;
> }
>=20
> extern void native_apic_wait_icr_idle(void);

As I recall, there are some variants which only support using the ax regis=
ter, so if you are going to do this might as well go all the way and force =
a specific instruction with specific registers, like mov (%rdx),%rax (by an=
alogy with the I/O registers=2E)