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From:   "Huang, Ying" <ying.huang@intel.com>
To:     Peter Xu <peterx@redhat.com>
Cc:     linux-mm@kvack.org, linux-kernel@vger.kernel.org,
        Minchan Kim <minchan@kernel.org>,
        David Hildenbrand <david@redhat.com>,
        Nadav Amit <nadav.amit@gmail.com>,
        Andrew Morton <akpm@linux-foundation.org>,
        Hugh Dickins <hughd@google.com>,
        Vlastimil Babka <vbabka@suse.cz>,
        Andrea Arcangeli <aarcange@redhat.com>,
        Andi Kleen <andi.kleen@intel.com>,
        "Kirill A . Shutemov" <kirill@shutemov.name>
Subject: Re: [PATCH v3 5/7] mm: Remember young/dirty bit for page migrations
References: <20220809220100.20033-1-peterx@redhat.com>
        <20220809220100.20033-6-peterx@redhat.com>
        <YvUeB0jc6clz59z5@xz-m1.local>
Date:   Fri, 12 Aug 2022 10:32:48 +0800
In-Reply-To: <YvUeB0jc6clz59z5@xz-m1.local> (Peter Xu's message of "Thu, 11
        Aug 2022 11:19:35 -0400")
Message-ID: <87pmh6dwdr.fsf@yhuang6-desk2.ccr.corp.intel.com>
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Peter Xu <peterx@redhat.com> writes:

> On Tue, Aug 09, 2022 at 06:00:58PM -0400, Peter Xu wrote:
>> diff --git a/mm/migrate_device.c b/mm/migrate_device.c
>> index 27fb37d65476..699f821b8443 100644
>> --- a/mm/migrate_device.c
>> +++ b/mm/migrate_device.c
>> @@ -221,6 +221,10 @@ static int migrate_vma_collect_pmd(pmd_t *pmdp,
>>  			else
>>  				entry = make_readable_migration_entry(
>>  							page_to_pfn(page));
>> +			if (pte_young(pte))
>> +				entry = make_migration_entry_young(entry);
>> +			if (pte_dirty(pte))
>> +				entry = make_migration_entry_dirty(entry);
>>  			swp_pte = swp_entry_to_pte(entry);
>>  			if (pte_present(pte)) {
>>  				if (pte_soft_dirty(pte))
>
> This change needs to be wrapped with pte_present() at least..
>
> I also just noticed that this change probably won't help anyway because:
>
>   (1) When ram->device, the pte will finally be replaced with a device
>       private entry, and device private entry does not yet support A/D, it
>       means A/D will be dropped again,
>
>   (2) When device->ram, we are missing information on either A/D bits, or
>       even if device private entries start to suport A/D, it's still not
>       clear whether we should take device read/write into considerations
>       too on the page A/D bits to be accurate.
>
> I think I'll probably keep the code there for completeness, but I think it
> won't really help much until more things are done.

It appears that there are more issues.  Between "pte = *ptep" and pte
clear, CPU may set A/D bit in PTE, so we may need to update pte when
clearing PTE.  And I don't find the TLB is flushed in some cases after
PTE is cleared.

Best Regards,
Huang, Ying