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From:   Jiri Olsa <olsajiri@gmail.com>
Date:   Fri, 12 Aug 2022 10:33:06 +0200
To:     Sandipan Das <sandipan.das@amd.com>
Cc:     linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
        x86@kernel.org, peterz@infradead.org, bp@alien8.de,
        acme@kernel.org, namhyung@kernel.org, tglx@linutronix.de,
        mingo@redhat.com, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, dave.hansen@linux.intel.com,
        like.xu.linux@gmail.com, eranian@google.com,
        ananth.narayan@amd.com, ravi.bangoria@amd.com,
        santosh.shukla@amd.com
Subject: Re: [PATCH 2/4] tools headers x86: Sync msr-index.h with kernel
 sources
Message-ID: <YvYQQr5VenglbpWM@krava>
References: <cover.1660217326.git.sandipan.das@amd.com>
 <ffb9a9f0aa46a4339bb61282e26810112700ae97.1660217326.git.sandipan.das@amd.com>
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On Thu, Aug 11, 2022 at 06:16:47PM +0530, Sandipan Das wrote:
> Sync msr-index.h with the kernel sources by adding the new AMD Last Branch
> Record Extension Version 2 (LbrExtV2) MSRs.
> 
> Signed-off-by: Sandipan Das <sandipan.das@amd.com>
> ---
>  tools/arch/x86/include/asm/msr-index.h | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
> index cc615be27a54..7f9eaf497947 100644
> --- a/tools/arch/x86/include/asm/msr-index.h
> +++ b/tools/arch/x86/include/asm/msr-index.h
> @@ -574,6 +574,9 @@
>  #define MSR_AMD64_PERF_CNTR_GLOBAL_CTL		0xc0000301
>  #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR	0xc0000302
>  
> +/* AMD Last Branch Record MSRs */
> +#define MSR_AMD64_LBR_SELECT			0xc000010e

curious do we actualy use this in tools somewhere?

jirka

> +
>  /* Fam 17h MSRs */
>  #define MSR_F17H_IRPERF			0xc00000e9
>  
> @@ -745,6 +748,8 @@
>  #define MSR_AMD_DBG_EXTN_CFG		0xc000010f
>  #define MSR_AMD_SAMP_BR_FROM		0xc0010300
>  
> +#define DBG_EXTN_CFG_LBRV2EN		BIT_ULL(6)
> +
>  #define MSR_IA32_MPERF			0x000000e7
>  #define MSR_IA32_APERF			0x000000e8
>  
> -- 
> 2.34.1
>