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Received: from PH7PR12MB5712.namprd12.prod.outlook.com (2603:10b6:510:1e3::13) by DM6PR12MB4516.namprd12.prod.outlook.com (2603:10b6:5:2ac::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5525.10; Fri, 12 Aug 2022 09:04:00 +0000 Received: from PH7PR12MB5712.namprd12.prod.outlook.com ([fe80::e459:32ff:cdfc:fc8b]) by PH7PR12MB5712.namprd12.prod.outlook.com ([fe80::e459:32ff:cdfc:fc8b%9]) with mapi id 15.20.5504.025; Fri, 12 Aug 2022 09:04:00 +0000 Message-ID: <94f483f5-c541-2a1e-87f6-a4105c30a045@amd.com> Date: Fri, 12 Aug 2022 14:33:46 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 Subject: Re: [PATCH 2/4] tools headers x86: Sync msr-index.h with kernel sources Content-Language: en-US To: Jiri Olsa Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, x86@kernel.org, peterz@infradead.org, bp@alien8.de, acme@kernel.org, namhyung@kernel.org, tglx@linutronix.de, mingo@redhat.com, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, dave.hansen@linux.intel.com, like.xu.linux@gmail.com, eranian@google.com, ananth.narayan@amd.com, ravi.bangoria@amd.com, santosh.shukla@amd.com References: From: Sandipan Das In-Reply-To: Content-Type: text/plain; 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E.g. one can trace the hardware LBR branch filter bits getting written to the LBR_SELECT MSR while recording branches. $ perf record -j any,u true $ perf record -j any_call,u true $ sudo perf trace -e msr:write_msr/max-stack=32/ --filter="msr == AMD64_LBR_SELECT" [...] 224568.130 perf/9093 msr:write_msr(msr: AMD64_LBR_SELECT, val: 1) do_trace_write_msr ([kernel.kallsyms]) do_trace_write_msr ([kernel.kallsyms]) native_write_msr ([kernel.kallsyms]) amd_pmu_lbr_enable_all ([kernel.kallsyms]) amd_pmu_v2_enable_all ([kernel.kallsyms]) x86_pmu_enable ([kernel.kallsyms]) ctx_resched ([kernel.kallsyms]) perf_event_exec ([kernel.kallsyms]) begin_new_exec ([kernel.kallsyms]) load_elf_binary ([kernel.kallsyms]) bprm_execve ([kernel.kallsyms]) do_execveat_common.isra.0 ([kernel.kallsyms]) __x64_sys_execve ([kernel.kallsyms]) do_syscall_64 ([kernel.kallsyms]) entry_SYSCALL_64 ([kernel.kallsyms]) execve (/usr/lib/x86_64-linux-gnu/libc.so.6) [...] 302748.439 perf/9126 msr:write_msr(msr: AMD64_LBR_SELECT, val: 229) do_trace_write_msr ([kernel.kallsyms]) do_trace_write_msr ([kernel.kallsyms]) native_write_msr ([kernel.kallsyms]) amd_pmu_lbr_enable_all ([kernel.kallsyms]) amd_pmu_v2_enable_all ([kernel.kallsyms]) x86_pmu_enable ([kernel.kallsyms]) ctx_resched ([kernel.kallsyms]) perf_event_exec ([kernel.kallsyms]) begin_new_exec ([kernel.kallsyms]) load_elf_binary ([kernel.kallsyms]) bprm_execve ([kernel.kallsyms]) do_execveat_common.isra.0 ([kernel.kallsyms]) __x64_sys_execve ([kernel.kallsyms]) do_syscall_64 ([kernel.kallsyms]) entry_SYSCALL_64 ([kernel.kallsyms]) execve (/usr/lib/x86_64-linux-gnu/libc.so.6) [...] I can add this example to the commit message in the next revision. - Sandipan