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Date:   Fri, 12 Aug 2022 16:39:47 -0300
From:   Arnaldo Carvalho de Melo <acme@kernel.org>
To:     Sandipan Das <sandipan.das@amd.com>
Cc:     Jiri Olsa <olsajiri@gmail.com>, linux-kernel@vger.kernel.org,
        linux-perf-users@vger.kernel.org, x86@kernel.org,
        peterz@infradead.org, bp@alien8.de, namhyung@kernel.org,
        tglx@linutronix.de, mingo@redhat.com, mark.rutland@arm.com,
        alexander.shishkin@linux.intel.com, dave.hansen@linux.intel.com,
        like.xu.linux@gmail.com, eranian@google.com,
        ananth.narayan@amd.com, ravi.bangoria@amd.com,
        santosh.shukla@amd.com
Subject: Re: [PATCH 2/4] tools headers x86: Sync msr-index.h with kernel
 sources
Message-ID: <Yvasg/P0v23ymrDo@kernel.org>
References: <cover.1660217326.git.sandipan.das@amd.com>
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Em Fri, Aug 12, 2022 at 02:33:46PM +0530, Sandipan Das escreveu:
> Hi Jiri,
> 
> On 8/12/2022 2:03 PM, Jiri Olsa wrote:
> > On Thu, Aug 11, 2022 at 06:16:47PM +0530, Sandipan Das wrote:
> >> Sync msr-index.h with the kernel sources by adding the new AMD Last Branch
> >> Record Extension Version 2 (LbrExtV2) MSRs.
> >>
> >> Signed-off-by: Sandipan Das <sandipan.das@amd.com>
> >> ---
> >>  tools/arch/x86/include/asm/msr-index.h | 5 +++++
> >>  1 file changed, 5 insertions(+)
> >>
> >> diff --git a/tools/arch/x86/include/asm/msr-index.h b/tools/arch/x86/include/asm/msr-index.h
> >> index cc615be27a54..7f9eaf497947 100644
> >> --- a/tools/arch/x86/include/asm/msr-index.h
> >> +++ b/tools/arch/x86/include/asm/msr-index.h
> >> @@ -574,6 +574,9 @@
> >>  #define MSR_AMD64_PERF_CNTR_GLOBAL_CTL		0xc0000301
> >>  #define MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR	0xc0000302
> >>  
> >> +/* AMD Last Branch Record MSRs */
> >> +#define MSR_AMD64_LBR_SELECT			0xc000010e
> > 
> > curious do we actualy use this in tools somewhere?
> > 
> > jirka
> > 
> 
> Commit 9dde6cadb92b ("tools arch x86: Sync the msr-index.h copy with the kernel sources")
> from Arnaldo says that adding these new MSR definitions in the tools headers allows the
> beautification scripts to pick up new entries which can be used for filtering MSR access
> traces.
> 
> E.g. one can trace the hardware LBR branch filter bits getting written to the LBR_SELECT
> MSR while recording branches.
> 
> $ perf record -j any,u true
> $ perf record -j any_call,u true
> 
> $ sudo perf trace -e msr:write_msr/max-stack=32/ --filter="msr == AMD64_LBR_SELECT"
> 
> [...]
> 224568.130 perf/9093 msr:write_msr(msr: AMD64_LBR_SELECT, val: 1)
>                                        do_trace_write_msr ([kernel.kallsyms])
>                                        do_trace_write_msr ([kernel.kallsyms])
>                                        native_write_msr ([kernel.kallsyms])
>                                        amd_pmu_lbr_enable_all ([kernel.kallsyms])
>                                        amd_pmu_v2_enable_all ([kernel.kallsyms])
>                                        x86_pmu_enable ([kernel.kallsyms])
>                                        ctx_resched ([kernel.kallsyms])
>                                        perf_event_exec ([kernel.kallsyms])
>                                        begin_new_exec ([kernel.kallsyms])
>                                        load_elf_binary ([kernel.kallsyms])
>                                        bprm_execve ([kernel.kallsyms])
>                                        do_execveat_common.isra.0 ([kernel.kallsyms])
>                                        __x64_sys_execve ([kernel.kallsyms])
>                                        do_syscall_64 ([kernel.kallsyms])
>                                        entry_SYSCALL_64 ([kernel.kallsyms])
>                                        execve (/usr/lib/x86_64-linux-gnu/libc.so.6)
> [...]
> 302748.439 perf/9126 msr:write_msr(msr: AMD64_LBR_SELECT, val: 229)
>                                        do_trace_write_msr ([kernel.kallsyms])
>                                        do_trace_write_msr ([kernel.kallsyms])
>                                        native_write_msr ([kernel.kallsyms])
>                                        amd_pmu_lbr_enable_all ([kernel.kallsyms])
>                                        amd_pmu_v2_enable_all ([kernel.kallsyms])
>                                        x86_pmu_enable ([kernel.kallsyms])
>                                        ctx_resched ([kernel.kallsyms])
>                                        perf_event_exec ([kernel.kallsyms])
>                                        begin_new_exec ([kernel.kallsyms])
>                                        load_elf_binary ([kernel.kallsyms])
>                                        bprm_execve ([kernel.kallsyms])
>                                        do_execveat_common.isra.0 ([kernel.kallsyms])
>                                        __x64_sys_execve ([kernel.kallsyms])
>                                        do_syscall_64 ([kernel.kallsyms])
>                                        entry_SYSCALL_64 ([kernel.kallsyms])
>                                        execve (/usr/lib/x86_64-linux-gnu/libc.so.6)
> [...]
> 
> I can add this example to the commit message in the next revision.

Right, you can reuse something from my messages updating this file or,
better, show an example like you did above, for the thing that you are
working at that moment :-)

One of the things we need to do is:

perf trace -e msr:write_msr/max-stack=32/ --filter-help

And then it should look what are the strings that can be used for that
specific msr:write_msr tracepoint.

Also have tab expansion in the --filter= part :-)

- Arnaldo