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Peter Anvin" To: Andy Shevchenko CC: Christophe Leroy , Linus Walleij , Bartosz Golaszewski , Jonathan Corbet , Russell King , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , Arnd Bergmann , "open list:GPIO SUBSYSTEM" , Linux Documentation List , Linux Kernel Mailing List , linux-arm Mailing List , Linux-Arch Subject: Re: [PATCH] gpio: Allow user to customise maximum number of GPIOs User-Agent: K-9 Mail for Android In-Reply-To: References: Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RDNS_NONE,SPF_HELO_PASS, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On August 12, 2022 2:58:36 PM PDT, Andy Shevchenko wrote: >On Thu, Aug 11, 2022 at 11:12 PM H=2E Peter Anvin wrote= : >> >> On August 9, 2022 3:40:38 AM PDT, Christophe Leroy wrote: >> >At the time being, the default maximum number of GPIOs is set to 512 >> >and can only get customised via an architecture specific >> >CONFIG_ARCH_NR_GPIO=2E >> > >> >The maximum number of GPIOs might be dependent on the number of >> >interface boards and is somewhat independent of architecture=2E >> > >> >Allow the user to select that maximum number outside of any >> >architecture configuration=2E To enable that, re-define a >> >core CONFIG_ARCH_NR_GPIO for architectures which don't already >> >define one=2E Guard it with a new hidden CONFIG_ARCH_HAS_NR_GPIO=2E >> > >> >Only two architectures will need CONFIG_ARCH_HAS_NR_GPIO: x86 and arm= =2E >> > >> >On arm, do like x86 and set 512 as the default instead of 0, that >> >allows simplifying the logic in asm-generic/gpio=2Eh > >=2E=2E=2E > >> This seems very odd to me=2E GPIOs can be, and often are, attached to p= eripheral buses which means that the *same system* can have anything from n= one to thousands of gpios =2E=2E > >Basically this setting should give us a *minimum* GPIO lines that are >present on the system=2E And that is perfectly SoC dependent=2E The real >issue is that the GPIO framework has these global arrays that (still?) >can't be initialized from the heap due to too early initialization (is >it the true reason?)=2E > Ok that makes more sense=2E=2E=2E but in that case, it would also be good = to reclaim excess storage that turns out to not be needed=2E I am a bit skeptical, though =E2=80=93 we get basic memory allocation very= early=2E