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Message-ID: <197d58ed8b674d622e5c6a049905cd88e40659bc.camel@icenowy.me>
Subject: Re: [PATCH 2/4] nvmem: sunxi_sid: Drop the workaround on A64
From:   Icenowy Zheng <uwu@icenowy.me>
To:     Samuel Holland <samuel@sholland.org>,
        Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
        Chen-Yu Tsai <wens@csie.org>,
        Jernej Skrabec <jernej.skrabec@gmail.com>
Cc:     Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Rob Herring <robh+dt@kernel.org>, devicetree@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-sunxi@lists.linux.dev
Date:   Mon, 15 Aug 2022 16:37:14 +0800
In-Reply-To: <20220814173656.11856-3-samuel@sholland.org>
References: <20220814173656.11856-1-samuel@sholland.org>
         <20220814173656.11856-3-samuel@sholland.org>
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=E5=9C=A8 2022-08-14=E6=98=9F=E6=9C=9F=E6=97=A5=E7=9A=84 12:36 -0500=EF=BC=
=8CSamuel Holland=E5=86=99=E9=81=93=EF=BC=9A
> Now that the SRAM readout code is fixed by using 32-bit accesses, it
> always returns the same values as register readout, so the A64
> variant
> no longer needs the workaround. This makes the D1 variant structure
> redundant, so remove it.

Is this really tested on A64?

>=20
> Signed-off-by: Samuel Holland <samuel@sholland.org>
> ---
>=20
> =C2=A0drivers/nvmem/sunxi_sid.c | 8 +-------
> =C2=A01 file changed, 1 insertion(+), 7 deletions(-)
>=20
> diff --git a/drivers/nvmem/sunxi_sid.c b/drivers/nvmem/sunxi_sid.c
> index 92dfe4cb10e3..a970f1741cc6 100644
> --- a/drivers/nvmem/sunxi_sid.c
> +++ b/drivers/nvmem/sunxi_sid.c
> @@ -197,15 +197,9 @@ static const struct sunxi_sid_cfg sun8i_h3_cfg =3D
> {
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0.need_register_readout =
=3D true,
> =C2=A0};
> =C2=A0
> -static const struct sunxi_sid_cfg sun20i_d1_cfg =3D {
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0.value_offset =3D 0x200,
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0.size =3D 0x100,
> -};
> -
> =C2=A0static const struct sunxi_sid_cfg sun50i_a64_cfg =3D {
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0.value_offset =3D 0x200,
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0.size =3D 0x100,
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0.need_register_readout =3D tru=
e,
> =C2=A0};
> =C2=A0
> =C2=A0static const struct sunxi_sid_cfg sun50i_h6_cfg =3D {
> @@ -218,7 +212,7 @@ static const struct of_device_id
> sunxi_sid_of_match[] =3D {
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0{ .compatible =3D "allwin=
ner,sun7i-a20-sid", .data =3D
> &sun7i_a20_cfg },
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0{ .compatible =3D "allwin=
ner,sun8i-a83t-sid", .data =3D
> &sun50i_a64_cfg },
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0{ .compatible =3D "allwin=
ner,sun8i-h3-sid", .data =3D
> &sun8i_h3_cfg },
> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0{ .compatible =3D "allwinner,s=
un20i-d1-sid", .data =3D
> &sun20i_d1_cfg },
> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0{ .compatible =3D "allwinner,s=
un20i-d1-sid", .data =3D
> &sun50i_a64_cfg },
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0{ .compatible =3D "allwin=
ner,sun50i-a64-sid", .data =3D
> &sun50i_a64_cfg },
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0{ .compatible =3D "allwin=
ner,sun50i-h5-sid", .data =3D
> &sun50i_a64_cfg },
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0{ .compatible =3D "allwin=
ner,sun50i-h6-sid", .data =3D
> &sun50i_h6_cfg },