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Mon, 15 Aug 2022 02:12:35 -0700 (PDT) Received: from linaro.org ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id b5-20020adff905000000b002205ffe88edsm6705381wrr.31.2022.08.15.02.12.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Aug 2022 02:12:34 -0700 (PDT) Date: Mon, 15 Aug 2022 12:12:33 +0300 From: Abel Vesa To: "Peng Fan (OSS)" Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, abelvesa@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Peng Fan Subject: Re: [PATCH V2 8/8] clk: imx93: add SAI IPG clk Message-ID: References: <20220815013039.474970-1-peng.fan@oss.nxp.com> <20220815013039.474970-9-peng.fan@oss.nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220815013039.474970-9-peng.fan@oss.nxp.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 22-08-15 09:30:39, Peng Fan (OSS) wrote: > From: Peng Fan > > The clk topology is as below: > bus_aon_root------>\ /--->SAI IPG > -->SAI LPCG gate--> > sai[x]_clk_root--->/ \--->SAI MCLK > > So use shared count as i.MX93 MU_B gate. > > Signed-off-by: Peng Fan Reviewed-by: Abel Vesa > --- > drivers/clk/imx/clk-imx93.c | 12 +++++++++--- > 1 file changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c > index 4008ab075dfe..6a76b9fdf18d 100644 > --- a/drivers/clk/imx/clk-imx93.c > +++ b/drivers/clk/imx/clk-imx93.c > @@ -28,6 +28,9 @@ enum clk_sel { > MAX_SEL > }; > > +static u32 share_count_sai1; > +static u32 share_count_sai2; > +static u32 share_count_sai3; > static u32 share_count_mub; > > static const char *parent_names[MAX_SEL][4] = { > @@ -215,9 +218,12 @@ static const struct imx93_clk_ccgr { > { IMX93_CLK_USDHC1_GATE, "usdhc1", "usdhc1_root", 0x9380, }, > { IMX93_CLK_USDHC2_GATE, "usdhc2", "usdhc2_root", 0x93c0, }, > { IMX93_CLK_USDHC3_GATE, "usdhc3", "usdhc3_root", 0x9400, }, > - { IMX93_CLK_SAI1_GATE, "sai1", "sai1_root", 0x9440, }, > - { IMX93_CLK_SAI2_GATE, "sai2", "sai2_root", 0x9480, }, > - { IMX93_CLK_SAI3_GATE, "sai3", "sai3_root", 0x94c0, }, > + { IMX93_CLK_SAI1_GATE, "sai1", "sai1_root", 0x9440, 0, &share_count_sai1}, > + { IMX93_CLK_SAI1_IPG, "sai1_ipg_clk", "bus_aon_root", 0x9440, 0, &share_count_sai1}, > + { IMX93_CLK_SAI2_GATE, "sai2", "sai2_root", 0x9480, 0, &share_count_sai2}, > + { IMX93_CLK_SAI2_IPG, "sai2_ipg_clk", "bus_wakeup_root", 0x9480, 0, &share_count_sai2}, > + { IMX93_CLK_SAI3_GATE, "sai3", "sai3_root", 0x94c0, 0, &share_count_sai3}, > + { IMX93_CLK_SAI3_IPG, "sai3_ipg_clk", "bus_wakeup_root", 0x94c0, 0, &share_count_sai3}, > { IMX93_CLK_MIPI_CSI_GATE, "mipi_csi", "media_apb_root", 0x9580, }, > { IMX93_CLK_MIPI_DSI_GATE, "mipi_dsi", "media_apb_root", 0x95c0, }, > { IMX93_CLK_LVDS_GATE, "lvds", "media_ldb_root", 0x9600, }, > -- > 2.37.1 >