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From:   <Conor.Dooley@microchip.com>
To:     <krzysztof.kozlowski@linaro.org>, <andre.przywara@arm.com>
CC:     <jernej.skrabec@gmail.com>, <samuel@sholland.org>, <wens@csie.org>,
        <linux-sunxi@lists.linux.dev>, <palmer@dabbelt.com>,
        <paul.walmsley@sifive.com>, <aou@eecs.berkeley.edu>,
        <linux-riscv@lists.infradead.org>, <heiko@sntech.de>,
        <robh+dt@kernel.org>, <devicetree@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <krzysztof.kozlowski+dt@linaro.org>
Subject: Re: [PATCH 06/12] riscv: dts: allwinner: Add the D1 SoC base
 devicetree
Thread-Topic: [PATCH 06/12] riscv: dts: allwinner: Add the D1 SoC base
 devicetree
Thread-Index: AQHYsGUwgMumzpPtekanQb2zMhKHQ62xJnqAgAACSwCAABbygIAAA9uAgAAEr4CAABXYAIAAAu6AgAAAT4CAAAYegA==
Date:   Tue, 16 Aug 2022 11:34:36 +0000
Message-ID: <4280f460-7963-10f0-a815-4bb1b62a62fe@microchip.com>
References: <20220815050815.22340-1-samuel@sholland.org>
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