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From:   Robert Marko <robimarko@gmail.com>
Date:   Tue, 16 Aug 2022 14:45:07 +0200
Message-ID: <CAOX2RU525OYLBb+Nek==84KA4a42ZTz89tgdMcgBCu=K8VzL9Q@mail.gmail.com>
Subject: Re: [PATCH] pinctrl: qcom: spmi-gpio: make the irqchip immutable
To:     Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc:     Marc Zyngier <maz@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Andy Gross <agross@kernel.org>,
        Linus Walleij <linus.walleij@linaro.org>,
        linux-arm-msm <linux-arm-msm@vger.kernel.org>,
        linux-gpio@vger.kernel.org,
        open list <linux-kernel@vger.kernel.org>
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On Tue, 19 Jul 2022 at 09:47, Manivannan Sadhasivam
<manivannan.sadhasivam@linaro.org> wrote:
>
> On Wed, Jul 13, 2022 at 02:33:32PM +0200, Robert Marko wrote:
> > On Wed, 13 Jul 2022 at 13:47, Marc Zyngier <maz@kernel.org> wrote:
> > >
> > > On 2022-07-13 12:08, Robert Marko wrote:
> > > > On Tue, 12 Jul 2022 at 17:12, Marc Zyngier <maz@kernel.org> wrote:
> > > >>
> > > >> On Tue, 12 Jul 2022 13:44:45 +0100,
> > > >> Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> wrote:
> > > >> >
> > > >> > On Tue, Jul 12, 2022 at 11:42:32AM +0100, Marc Zyngier wrote:
> > > >> > > On Fri, 24 Jun 2022 20:51:12 +0100,
> > > >> > > Robert Marko <robimarko@gmail.com> wrote:
> > > >> > > >
> > > >> > > > Commit 6c846d026d49 ("gpio: Don't fiddle with irqchips marke=
d as
> > > >> > > > immutable") added a warning to indicate if the gpiolib is al=
tering the
> > > >> > > > internals of irqchips.
> > > >> > > >
> > > >> > > > Following this change the following warning is now observed =
for the SPMI
> > > >> > > > PMIC pinctrl driver:
> > > >> > > > gpio gpiochip1: (200f000.spmi:pmic@0:gpio@c000): not an immu=
table chip, please consider fixing it!
> > > >> > > >
> > > >> > > > Fix this by making the irqchip in the SPMI PMIC pinctrl driv=
er immutable.
> > > >> > > >
> > > >> > > > Signed-off-by: Robert Marko <robimarko@gmail.com>
> > > >> > > > ---
> > > >> > > >  drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 22 ++++++++++++-=
---------
> > > >> > > >  1 file changed, 12 insertions(+), 10 deletions(-)
> > > >> > > >
> > > >> > > > diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/driv=
ers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > > >> > > > index c3255b0bece4..406ee0933d0b 100644
> > > >> > > > --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > > >> > > > +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c
> > > >> > > > @@ -171,7 +171,6 @@ struct pmic_gpio_state {
> > > >> > > >   struct regmap   *map;
> > > >> > > >   struct pinctrl_dev *ctrl;
> > > >> > > >   struct gpio_chip chip;
> > > >> > > > - struct irq_chip irq;
> > > >> > > >   u8 usid;
> > > >> > > >   u8 pid_base;
> > > >> > > >  };
> > > >> > > > @@ -988,6 +987,17 @@ static void *pmic_gpio_populate_parent_=
fwspec(struct gpio_chip *chip,
> > > >> > > >   return fwspec;
> > > >> > > >  }
> > > >> > > >
> > > >> > > > +static const struct irq_chip spmi_gpio_irq_chip =3D {
> > > >> > > > + .name           =3D "spmi-gpio",
> > > >> > > > + .irq_ack        =3D irq_chip_ack_parent,
> > > >> > > > + .irq_mask       =3D irq_chip_mask_parent,
> > > >> > > > + .irq_unmask     =3D irq_chip_unmask_parent,
> > > >> > >
> > > >> > > No, this is wrong. Please look at the documentation to see how=
 you
> > > >> > > must now directly call into the gpiolib helpers for these two
> > > >> > > callbacks.
> > > >> > >
> > > >> >
> > > >> > IIUC, you are referring to gpiochip_disable_irq() and
> > > >> > gpiochip_enable_irq() APIs.
> > > >>
> > > >> I am indeed.
> > > >>
> > > >> > These APIs are supposed to let the gpiolib know about that the I=
RQ
> > > >> > usage of these GPIOs. But for the case of hierarchial IRQ domain=
,
> > > >> > isn't the parent is going to do that?
> > > >>
> > > >> Why would it? The parent has no clue about what sits above it. In =
a
> > > >> hierarchical configuration, each level is responsible for its own
> > > >> level, and the GPIO layer should be responsible for its own
> > > >> management.
> > > >>
> > > >> > Please correct me if I'm wrong.
> > > >>
> > > >> I'm afraid you are, and this patch is a fairly obvious change in
> > > >> behaviour, as the callbacks you mention above are not called anymo=
re,
> > > >> while they were before.
> > > >>
> > > >> If they are not necessary (for reasons I can't fathom), then this
> > > >> should be clearly explained.
> > > >
> > > > Hi Marc,
> > > > I will look at IRQ GPIO docs, but in this case, then we have more
> > > > conversions that
> > > > are not correct.
> > >
> > > Then please point them out.
> >
> > Oh, now I get the issue, I was misunderstanding it completely.
> > gpiochip_enable_irq and gpiochip_disable_irq are not being called
> > at all.
> >
> > However, I dont see them being called before the conversion as well.
> > I am not really familiar with the PMIC IRQ-s, looked like an easy conve=
rsion
> > to get rid of the warning.
> >
> > Manivannan can you shed some light on this?
> >
>
> I hope you got the answer by now. When I looked into the conversion I saw=
 that
> there were missing calls to gpiochip_{enable/disable}_irq APIs. But at th=
at
> time I blindly assumed (yeah very bad of myself) that the parent irqchip =
will
> handle that :(
>
> Anyway, you should call these helpers from the mask/unmask callbacks as a=
 part
> of the conversion patch. Let me know if you are onto it or not!

Hi, I completely missed your reply.
Currently, I am pretty swamped with other work so I dont know when
will I be able
to look into this again.

Regards,
Robert
>
> Thanks,
> Mani
>
> > Regards,
> > Robert
> >
> >
> >
> >
> >
> > >
> > >          M.
> > > --
> > > Jazz is not dead. It just smells funny...
>
> --
> =E0=AE=AE=E0=AE=A3=E0=AE=BF=E0=AE=B5=E0=AE=A3=E0=AF=8D=E0=AE=A3=E0=AE=A9=
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