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[2001:14bb:ae:539c:1782:dd68:b0c1:c1a4]) by smtp.gmail.com with ESMTPSA id a18-20020a05651c031200b0025e728764ebsm1736180ljp.105.2022.08.16.06.23.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 16 Aug 2022 06:23:44 -0700 (PDT) Message-ID: <32c92eb8-599a-2525-1306-bdc3beb33f49@linaro.org> Date: Tue, 16 Aug 2022 16:23:42 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 Subject: Re: [PATCH 1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP OCM Content-Language: en-US To: "Potthuri, Sai Krishna" , Rob Herring , Krzysztof Kozlowski , Michal Simek , Borislav Petkov , Mauro Carvalho Chehab , Tony Luck , James Morse , Robert Richter Cc: "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-edac@vger.kernel.org" , "saikrishna12468@gmail.com" , "git (AMD-Xilinx)" , Shubhrajyoti Datta References: <20220816073203.27314-1-sai.krishna.potthuri@amd.com> <20220816073203.27314-2-sai.krishna.potthuri@amd.com> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 16/08/2022 15:43, Potthuri, Sai Krishna wrote: > Hi Krzysztof, > >> -----Original Message----- >> From: Krzysztof Kozlowski >> Sent: Tuesday, August 16, 2022 1:29 PM >> To: Potthuri, Sai Krishna ; Rob Herring >> ; Krzysztof Kozlowski >> ; Michal Simek >> ; Borislav Petkov ; Mauro >> Carvalho Chehab ; Tony Luck ; >> James Morse ; Robert Richter >> Cc: devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- >> kernel@vger.kernel.org; linux-edac@vger.kernel.org; >> saikrishna12468@gmail.com; git (AMD-Xilinx) ; Shubhrajyoti >> Datta >> Subject: Re: [PATCH 1/2] dt-bindings: edac: Add bindings for Xilinx ZynqMP >> OCM >> >> On 16/08/2022 10:32, Sai Krishna Potthuri wrote: >>> From: Shubhrajyoti Datta >>> >>> Add bindings for Xilinx ZynqMP OCM controller. >>> >>> Signed-off-by: Shubhrajyoti Datta >>> Signed-off-by: Sai Krishna Potthuri >>> --- >>> .../bindings/edac/xlnx,zynqmp-ocmc.yaml | 41 +++++++++++++++++++ >>> 1 file changed, 41 insertions(+) >>> create mode 100644 >>> Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml >>> >>> diff --git >>> a/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml >>> b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml >>> new file mode 100644 >>> index 000000000000..9bcecaccade2 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/edac/xlnx,zynqmp-ocmc.yaml >>> @@ -0,0 +1,41 @@ >>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/edac/xlnx,zynqmp-ocmc.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: Xilinx Zynqmp OCM EDAC driver >> >> s/EDAC driver// >> Is it a memory controller? > This driver is about Error Detection and Correction feature for OCM (On Chip > Memory) controller which supports ECC functionality. I am not talking about driver. What is the hardware exactly? On Chip Memory Controller sounds like Memory Controller, so use this instead of EDAC. Best regards, Krzysztof