Received: by 2002:a05:6358:4e97:b0:b3:742d:4702 with SMTP id ce23csp4289715rwb; Tue, 16 Aug 2022 19:03:44 -0700 (PDT) X-Google-Smtp-Source: AA6agR7J0lWb7Ws88sB62QVnSf+PBjNDZrR5aZD94UDdY8x0DmVeTqediFs6ZQOJkUuS/zxF7vkG X-Received: by 2002:a05:6402:360d:b0:445:bd16:803b with SMTP id el13-20020a056402360d00b00445bd16803bmr2097537edb.318.1660701824510; Tue, 16 Aug 2022 19:03:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1660701824; cv=none; d=google.com; s=arc-20160816; b=UcRsIa5ep748IItv4z9Ho15pPb+hsLov7F9Ox3QlbGqm+Fv7HXUYajMZHF8BYnSybb NVi/Kj3H7JRl8Zd8t5Oi9dKfVwePqiBVwRn6so/sLbJQB3cSRGZf5Cqx/VE/2qNBCmWD DmARIBWOyTeJTpBKtO9GHbXVytux4a4qFmb0UjolP8UE1VYc6qMTL6V/TXh0LgyBeA/v pA7zXDZkqWefbWRHOmvycciIUR/HVx6iV11IGh252mNZOVMwYWz0XI68XLsAAbrfmo6N bivuyhr6VNpeMus/SVouwdS6v/mMjF1g5fTOvPAZvUyt/vH2SNSsIqmgpr/ZNtHJaomd 4dQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eOmG1/sJwNzyp6Jr8ACKbVHzVEMS0TlWhK5SLB+Ui5Y=; b=D+W7hwHKcfahEULGf32OTwOaYUXIqiSOTqgg7NK2/TGwOeAZcOUFFOuoa4+AWZ85YZ gfaURIwdKT/YDw4X37P3QaGsFpxOhXek5XOliZtqk32P5OZXyQdn6QbZfBdaCdBqCEiF ysYk9ARAqEcamVcHa1dLGZfRORmH7HvQ+ZMep6n1Mlq8aUjuVxU4UurAH2VXf2Ws8ImT X9pTmfp/m9ZJInwAZpgjjkKPabiAqyIFFik8K+3KN0GioRDoi+lokyFtTuzWTFXo/Gty tveFx5EpoPNBg5O7wfa5uCjgD04l+K1TuQINqYvUiK5M/QvzB3VWfu860OTNj0AtX6e3 EzhQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=cpjMbKxs; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u14-20020a056402110e00b0043f2402c310si10731113edv.121.2022.08.16.19.03.18; Tue, 16 Aug 2022 19:03:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=cpjMbKxs; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238182AbiHQB00 (ORCPT + 99 others); Tue, 16 Aug 2022 21:26:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53092 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238158AbiHQB0U (ORCPT ); Tue, 16 Aug 2022 21:26:20 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BCC9C77544; Tue, 16 Aug 2022 18:26:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660699577; x=1692235577; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8xFxRRHwhTg5GXdB9KCgKx3pYEteRo45ul1+uUVvZW8=; b=cpjMbKxsu/5ZHWHiPFtjBZnI8chROOYezWWOGiElA9Cj70M29sVsJJE3 npJX9L+jxgOGWVQq6ZZpTLiBYCZKTkFQyoY7lXvLqq2RJQC9Wtl44dfSE 5r97eCepZsO5GlREfshsOoLunG4yx2FyIQNRY7qOGH3JevvB6n3b317Ck /V09h3hoVEC3sLOcvHleTjppuije4k/sU092o7s+3SWPI64xrMEVMtgId THbjldnPujZWOup2ow1733B3T+JRyN0S/eFDPPFJfUSLk/IKouES5D7Wj pyC0tjbFqmf258Mfunvep4QAlo8Wc/zoiXe5PX6E86b7urRW/Zcpv3nMJ w==; X-IronPort-AV: E=McAfee;i="6400,9594,10441"; a="293649213" X-IronPort-AV: E=Sophos;i="5.93,242,1654585200"; d="scan'208";a="293649213" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Aug 2022 18:26:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,242,1654585200"; d="scan'208";a="696587920" Received: from allen-box.sh.intel.com ([10.239.159.48]) by FMSMGA003.fm.intel.com with ESMTP; 16 Aug 2022 18:26:13 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Bjorn Helgaas , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker , Dave Jiang , Vinod Koul Cc: Eric Auger , Liu Yi L , Jacob jun Pan , Zhangfei Gao , Zhu Tony , iommu@lists.linux.dev, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Lu Baolu , Jean-Philippe Brucker Subject: [PATCH v11 06/13] iommu: Add IOMMU SVA domain support Date: Wed, 17 Aug 2022 09:20:17 +0800 Message-Id: <20220817012024.3251276-7-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220817012024.3251276-1-baolu.lu@linux.intel.com> References: <20220817012024.3251276-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The sva iommu_domain represents a hardware pagetable that the IOMMU hardware could use for SVA translation. This adds some infrastructure to support SVA domain in the iommu common layer. It includes: - Extend the iommu_domain to support a new IOMMU_DOMAIN_SVA domain type. The IOMMU drivers that support allocation of the SVA domain should provide its own sva domain specific iommu_domain_ops. - Add a helper to allocate an SVA domain. The iommu_domain_free() is still used to free an SVA domain. The report_iommu_fault() should be replaced by the new iommu_report_device_fault(). Leave the existing fault handler with the existing users and the newly added SVA members excludes it. Suggested-by: Jean-Philippe Brucker Suggested-by: Jason Gunthorpe Signed-off-by: Lu Baolu Reviewed-by: Jean-Philippe Brucker Reviewed-by: Kevin Tian Reviewed-by: Jason Gunthorpe Reviewed-by: Yi Liu --- include/linux/iommu.h | 25 +++++++++++++++++++++++-- drivers/iommu/iommu.c | 20 ++++++++++++++++++++ 2 files changed, 43 insertions(+), 2 deletions(-) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index f1e8953b1e2e..d0b32a289835 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -64,6 +64,8 @@ struct iommu_domain_geometry { #define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */ #define __IOMMU_DOMAIN_DMA_FQ (1U << 3) /* DMA-API uses flush queue */ +#define __IOMMU_DOMAIN_SVA (1U << 4) /* Shared process address space */ + /* * This are the possible domain-types * @@ -77,6 +79,8 @@ struct iommu_domain_geometry { * certain optimizations for these domains * IOMMU_DOMAIN_DMA_FQ - As above, but definitely using batched TLB * invalidation. + * IOMMU_DOMAIN_SVA - DMA addresses are shared process addresses + * represented by mm_struct's. */ #define IOMMU_DOMAIN_BLOCKED (0U) #define IOMMU_DOMAIN_IDENTITY (__IOMMU_DOMAIN_PT) @@ -86,15 +90,24 @@ struct iommu_domain_geometry { #define IOMMU_DOMAIN_DMA_FQ (__IOMMU_DOMAIN_PAGING | \ __IOMMU_DOMAIN_DMA_API | \ __IOMMU_DOMAIN_DMA_FQ) +#define IOMMU_DOMAIN_SVA (__IOMMU_DOMAIN_SVA) struct iommu_domain { unsigned type; const struct iommu_domain_ops *ops; unsigned long pgsize_bitmap; /* Bitmap of page sizes in use */ - iommu_fault_handler_t handler; - void *handler_token; struct iommu_domain_geometry geometry; struct iommu_dma_cookie *iova_cookie; + union { + struct { + iommu_fault_handler_t handler; + void *handler_token; + }; + struct { /* IOMMU_DOMAIN_SVA */ + struct mm_struct *mm; + refcount_t users; + }; + }; }; static inline bool iommu_is_dma_domain(struct iommu_domain *domain) @@ -683,6 +696,8 @@ int iommu_group_claim_dma_owner(struct iommu_group *group, void *owner); void iommu_group_release_dma_owner(struct iommu_group *group); bool iommu_group_dma_owner_claimed(struct iommu_group *group); +struct iommu_domain *iommu_sva_domain_alloc(struct device *dev, + struct mm_struct *mm); int iommu_attach_device_pasid(struct iommu_domain *domain, struct device *dev, ioasid_t pasid); void iommu_detach_device_pasid(struct iommu_domain *domain, @@ -1057,6 +1072,12 @@ static inline bool iommu_group_dma_owner_claimed(struct iommu_group *group) return false; } +static inline struct iommu_domain * +iommu_sva_domain_alloc(struct device *dev, struct mm_struct *mm) +{ + return NULL; +} + static inline int iommu_attach_device_pasid(struct iommu_domain *domain, struct device *dev, ioasid_t pasid) { diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 6f2cbccc0570..ac5a1f51a9a1 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -27,6 +27,7 @@ #include #include #include +#include static struct kset *iommu_group_kset; static DEFINE_IDA(iommu_group_ida); @@ -1960,6 +1961,8 @@ EXPORT_SYMBOL_GPL(iommu_domain_alloc); void iommu_domain_free(struct iommu_domain *domain) { + if (domain->type == IOMMU_DOMAIN_SVA) + mmdrop(domain->mm); iommu_put_dma_cookie(domain); domain->ops->free(domain); } @@ -3381,3 +3384,20 @@ iommu_get_domain_for_dev_pasid(struct device *dev, ioasid_t pasid) return domain; } EXPORT_SYMBOL_GPL(iommu_get_domain_for_dev_pasid); + +struct iommu_domain *iommu_sva_domain_alloc(struct device *dev, + struct mm_struct *mm) +{ + const struct iommu_ops *ops = dev_iommu_ops(dev); + struct iommu_domain *domain; + + domain = ops->domain_alloc(IOMMU_DOMAIN_SVA); + if (!domain) + return NULL; + + domain->type = IOMMU_DOMAIN_SVA; + mmgrab(mm); + domain->mm = mm; + + return domain; +} -- 2.25.1