Received: by 2002:a05:6358:4e97:b0:b3:742d:4702 with SMTP id ce23csp4420317rwb; Tue, 16 Aug 2022 22:34:32 -0700 (PDT) X-Google-Smtp-Source: AA6agR59yroxrDv615puzFPozdpJIe/Za9UzQuYPmuTDRRKSdF5wkoPa3bS16NUw5g89ipIt0vRu X-Received: by 2002:a65:6d97:0:b0:41c:1e06:3ba4 with SMTP id bc23-20020a656d97000000b0041c1e063ba4mr20477977pgb.282.1660714472178; Tue, 16 Aug 2022 22:34:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1660714472; cv=none; d=google.com; s=arc-20160816; b=REOGAbpMV7Etw6oFN+gdTJmp4caBumBTuI7NH/X3P9oAVfeHzqQWx8t1dmE3hIl4XX 0it4/wdgRhexjoB09Olm6dDPHysoc84Dp/oMnLeEic83/OQkrO1Z+PL5IO6DxPA/xYwt XohMEOsQDNOZBOxgwXft7mhJ5TieZNkegdpTexcZbrBFG3ld6PMjws01gWrToNzIzB2N inmqHLycx9QaP3NNsASlyrFybhHeo0mBI3hk/oVERVKv8FNjRnvqfv/tI3FGVyuk6n9O k/0OLrqZ20lJHQtUwngabSjuacz8Xsg10Y6773mRNZEmB9tkWnZDLQZPQa1z4mzyz0bd PCaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=d6chSXHntoQ0V98P0UAqGnIrpZSx3swqvI1kYjvrb0A=; b=lm5b3PP1VtEVH2ve5xSIjAfCuYx93/SlQGUif9nbPCrRLyz5K7BuMaIdf/RqWy3tTI XribxLUVWUboSvWL/d6cFeT7NPJymmxEg0WZ91kMIEKsS3KsRb6oMUsKL95Khm2SlPsa X0Q69ygyuHoV5qGzuzrqqsF1srqeO50UNyFWMouUR1KrMEfQ9nD1grhT2sDOIIHwiBSD mPoSTLOd9lZUoyvIBbxzMQoNj5aMRoBAm+Cp+wNbAWZ7uRuntdiURp8+2zbKiCz/FgYL 6avp6QKv8VZhO4WFjhYdhkBxL4S6zcsjmbRatOTkX/6uz2Qt0mFELn1qO+QSoJPFDfIn dlxg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id o16-20020a63e350000000b004128ea1a97dsi15382757pgj.399.2022.08.16.22.34.18; Tue, 16 Aug 2022 22:34:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230492AbiHQFGl (ORCPT + 99 others); Wed, 17 Aug 2022 01:06:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229807AbiHQFGj (ORCPT ); Wed, 17 Aug 2022 01:06:39 -0400 Received: from fornost.hmeau.com (helcar.hmeau.com [216.24.177.18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A5C26CF74; Tue, 16 Aug 2022 22:06:34 -0700 (PDT) Received: from gwarestrin.arnor.me.apana.org.au ([192.168.103.7]) by fornost.hmeau.com with smtp (Exim 4.94.2 #2 (Debian)) id 1oOBFW-00BuOh-ON; Wed, 17 Aug 2022 15:05:51 +1000 Received: by gwarestrin.arnor.me.apana.org.au (sSMTP sendmail emulation); Wed, 17 Aug 2022 13:05:50 +0800 Date: Wed, 17 Aug 2022 13:05:50 +0800 From: Herbert Xu To: Linus Torvalds Cc: Will Deacon , Tejun Heo , marcan@marcan.st, peterz@infradead.org, jirislaby@kernel.org, maz@kernel.org, mark.rutland@arm.com, boqun.feng@gmail.com, catalin.marinas@arm.com, oneukum@suse.com, roman.penyaev@profitbricks.com, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, "David S. Miller" Subject: Re: [PATCH] workqueue: Fix memory ordering race in queue_work*() Message-ID: References: <20220816134156.GB11202@willie-the-truck> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Aug 16, 2022 at 09:41:52AM -0700, Linus Torvalds wrote: . > So I htink the code problem is easy, I think the real problem here has > always been bad documentation, and it would be really good to clarify > that. > > Comments? The problem is that test_and_set_bit has been unambiguously documented to have memory barriers since 2005: commit 3085f02b869d980c5588f3e8fb136b0b465a2759 Author: David S. Miller Date: Fri Feb 4 23:39:15 2005 -0800 [DOC]: Add asm/atomic.h asm/bitops.h implementation specification. And this is what it says: + int test_and_set_bit(unsigned long nr, volatils unsigned long *addr); + int test_and_clear_bit(unsigned long nr, volatils unsigned long *addr); + int test_and_change_bit(unsigned long nr, volatils unsigned long *addr); ...snip... +These routines, like the atomic_t counter operations returning values, +require explicit memory barrier semantics around their execution. All +memory operations before the atomic bit operation call must be made +visible globally before the atomic bit operation is made visible. +Likewise, the atomic bit operation must be visible globally before any +subsequent memory operation is made visible. For example: + + obj->dead = 1; + if (test_and_set_bit(0, &obj->flags)) + /* ... */; + obj->killed = 1; This file wasn't removed until 16/11/2020 by f0400a77ebdc. In that time people who wrote code using test_and_set_bit could have legitimately relied on the memory barrier as documented. Changing this restrospectively is dangerous. I'm fine with introducing new primitives that have different properties, and then converting the existing users of test_and_set_bit over on a case-by-case basis. Cheers, -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt