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From:   Peng Fan <peng.fan@nxp.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
        Georgi Djakov <djakov@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Pengutronix Kernel Team <kernel@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
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        <linux-arm-kernel@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 2/2] dt-bindings: memory-controllers: fsl,imx8m-ddrc: drop
 Leonard Crestez
Thread-Topic: [PATCH 2/2] dt-bindings: memory-controllers: fsl,imx8m-ddrc:
 drop Leonard Crestez
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Date:   Wed, 17 Aug 2022 07:02:28 +0000
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 <20220817065946.24303-2-krzysztof.kozlowski@linaro.org>
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> Subject: [PATCH 2/2] dt-bindings: memory-controllers: fsl,imx8m-ddrc: dro=
p
> Leonard Crestez
>=20
> Emails to Leonard Crestez bounce ("550 5.4.1 Recipient address rejected:
> Access denied:), so change maintainer to Peng Fan from NXP.
>=20
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Thanks. Acked-by: Peng Fan <peng.fan@nxp.com>

Thanks,
Peng.=20

> ---
>  .../devicetree/bindings/memory-controllers/fsl/imx8m-ddrc.yaml  | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/Documentation/devicetree/bindings/memory-
> controllers/fsl/imx8m-ddrc.yaml
> b/Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-
> ddrc.yaml
> index fc2e7de10331..519b123116dc 100644
> --- a/Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-
> ddrc.yaml
> +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/imx8m-
> ddrc.yaml
> @@ -7,7 +7,7 @@ $schema:
> https://eur01.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2Fdevice
> tree.org%2Fmeta-
> schemas%2Fcore.yaml%23&amp;data=3D05%7C01%7Cpeng.fan%40nxp.com%
> 7Cbc4ca1b3eb7f4ea37a6f08da801e15ac%7C686ea1d3bc2b4c6fa92cd99c5c3
> 01635%7C0%7C0%7C637963163958140691%7CUnknown%7CTWFpbGZsb3d
> 8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%
> 3D%7C3000%7C%7C%7C&amp;sdata=3DaRsRxhGmrmdagEf8lKIZYpYMaW1E87
> 7GWn4j%2BW9e2Gw%3D&amp;reserved=3D0
>  title: i.MX8M DDR Controller
>=20
>  maintainers:
> -  - Leonard Crestez <leonard.crestez@nxp.com>
> +  - Peng Fan <peng.fan@nxp.com>
>=20
>  description:
>    The DDRC block is integrated in i.MX8M for interfacing with DDR based
> --
> 2.34.1