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Message-ID: <1891bc72834cb6e25d479c3968c04bcef94c3ad5.camel@icenowy.me>
Subject: Re: [PATCH 2/2] ASoC: Intel: Skylake: try to get NHLT blob with PCM
 params as fallback
From:   Icenowy Zheng <uwu@icenowy.me>
To:     Cezary Rojewski <cezary.rojewski@intel.com>
Cc:     alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
        Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>,
        Liam Girdwood <liam.r.girdwood@linux.intel.com>,
        Peter Ujfalusi <peter.ujfalusi@linux.intel.com>,
        Bard Liao <yung-chuan.liao@linux.intel.com>,
        Ranjani Sridharan <ranjani.sridharan@linux.intel.com>,
        Kai Vehmanen <kai.vehmanen@linux.intel.com>,
        Mark Brown <broonie@kernel.org>,
        Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>
Date:   Wed, 17 Aug 2022 20:48:04 +0800
In-Reply-To: <85648922-27df-051d-8ae8-d0e4e810198a@intel.com>
References: <20220725111002.143765-1-uwu@icenowy.me>
         <20220725111002.143765-2-uwu@icenowy.me>
         <4208aece-0aea-ba86-9a00-9e217546e1dd@intel.com>
         <3346b62c3cd7e07766457c9140849a31d6d8775c.camel@icenowy.me>
         <85648922-27df-051d-8ae8-d0e4e810198a@intel.com>
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=E5=9C=A8 2022-08-16=E6=98=9F=E6=9C=9F=E4=BA=8C=E7=9A=84 21:08 +0200=EF=BC=
=8CCezary Rojewski=E5=86=99=E9=81=93=EF=BC=9A
> On 2022-08-07 7:26 PM, Icenowy Zheng wrote:
> > =E5=9C=A8 2022-08-02=E6=98=9F=E6=9C=9F=E4=BA=8C=E7=9A=84 12:30 +0200=EF=
=BC=8CCezary Rojewski=E5=86=99=E9=81=93=EF=BC=9A
> > > On 2022-07-25 1:10 PM, Icenowy Zheng wrote:
> > > > Switching to use pipeline parameters to get NHLT blob breaks
> > > > audio
> > > > on
> > > > HP Chromebook 13 G1 (at least with MrChromeBox firmware).
>=20
> ...
>=20
> > > Could you share the NHLT file from your platform plus the format
> > > used
> > > by
> > > the cras/userspace tool? Did you try playing over simple aplay
> > > tool
> > > instead?
> >=20
> > I tried 48000Hz 2ch 32bit with speaker-test.
> >=20
> > Attached is /sys/firmware/acpi/tables/NHLT.
>=20
>=20
> Thanks for the NHLT dump. Total of five endpoints are part of the=20
> description:
>=20
> id 0, DMIC capture, formats:
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[0] 2/16/16/48000
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[1] 2/32/32/48000
> id 1, I2S SSP0 playback, formats:
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[0] 2/24/32/48000
> id 2, I2S SSP0 capture, formats:
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[0] 4/32/32/48000
> id 3, I2S SSP1 playback, formats:
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[0] 2/24/32/48000
> id 4, I2S SSP1 capture, formats:
> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[0] 2/24/32/48000
>=20
> I know not what "speaker-test" means. Could you specify which
> endpoint=20

Well to be honest I know nearly nothing about Intel ASoC. (In fact I
have only a little experience dealing with ASoC on DT-based platforms
with asoc-simple-card)

I assume it uses the first playback stream, because I didn't explicitly
choose any streams; and speaker-test is only a playback test program.

> you are speaking of? Providing either alsa info or at least output of
> 'lsmod | grep snd' would help. I'd like to be aware of which machine=20
> board are we talking about.
>=20
> What could be guessed with the current info (and some google query),
> is=20
> that we are dealing with SKL-Y m5-6Y57, codenamed 'Chell' and the=20
> speaker-test is playing through an I2S codec connected to SSP0 port.=20
> It's probably max98357a. The skylake-driver version you have gets=20
> confused with 24/32 format (userspace is probably attempting 32/32).=20
> That or topology file is incorrect..

Yes, it's Chell.

BTW do you need other ACPI tables?

>=20
> ..and at this point I probably know more than enough. We have tested=20
> basically all of the KBL and AML configurations when fixing
> regressions=20
> during recent skylake-driver up-revs. But Chell (and Lars for that=20
> matter) families were not among them as these are based on SKL. I'll=20
> follow up on this with our partners and come back here. I'm almost=20
> certain topology files for the two families mentioned were not
> updated=20
> along the way.

Could this be an issue of Coreboot, which generates the NHLT table?

BTW I think Google pinned the official OS of this hardware to a much
lower kernel version (but I don't want to use the official OS because
of limited storage of Chell and lack of VM ability of the OS on Chell).

>=20
>=20
> Regards,
> Czarek