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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Aug 2022 15:06:09.0902 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 74002ad6-3c20-49dc-a8e3-08da8062043f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT083.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6859 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org CDX bus driver manages the scanning and populating FPGA based devices present on the CDX bus. The bus driver sets up the basic infrastructure and fetches the device related information from the firmware. These devices are registered as platform devices. CDX bus is capable of scanning devices dynamically, supporting rescanning of dynamically added, removed or updated devices. Signed-off-by: Nipun Gupta --- Please NOTE: This is a RFC change which does not yet support the CDX bus firmware interface as it is under development, and this series aims to get an early feedback from the community. There are TODO items mentioned in this patch which needs to be updated once firmware support is complete. MAINTAINERS | 1 + drivers/bus/Kconfig | 1 + drivers/bus/Makefile | 3 + drivers/bus/cdx/Kconfig | 7 ++ drivers/bus/cdx/Makefile | 3 + drivers/bus/cdx/cdx.c | 241 ++++++++++++++++++++++++++++++++++++ drivers/bus/cdx/cdx.h | 35 ++++++ include/linux/cdx/cdx_bus.h | 26 ++++ 8 files changed, 317 insertions(+) create mode 100644 drivers/bus/cdx/Kconfig create mode 100644 drivers/bus/cdx/Makefile create mode 100644 drivers/bus/cdx/cdx.c create mode 100644 drivers/bus/cdx/cdx.h create mode 100644 include/linux/cdx/cdx_bus.h diff --git a/MAINTAINERS b/MAINTAINERS index 32c5be3d6a53..b0eea32dbb39 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22301,6 +22301,7 @@ M: Nipun Gupta M: Nikhil Agarwal S: Maintained F: Documentation/devicetree/bindings/bus/xlnx,cdx.yaml +F: drivers/bus/cdx/* XILINX GPIO DRIVER M: Shubhrajyoti Datta diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig index 7bfe998f3514..b0324efb9a6a 100644 --- a/drivers/bus/Kconfig +++ b/drivers/bus/Kconfig @@ -251,5 +251,6 @@ config DA8XX_MSTPRI source "drivers/bus/fsl-mc/Kconfig" source "drivers/bus/mhi/Kconfig" +source "drivers/bus/cdx/Kconfig" endmenu diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile index d90eed189a65..88649111c395 100644 --- a/drivers/bus/Makefile +++ b/drivers/bus/Makefile @@ -20,6 +20,9 @@ obj-$(CONFIG_INTEL_IXP4XX_EB) += intel-ixp4xx-eb.o obj-$(CONFIG_MIPS_CDMM) += mips_cdmm.o obj-$(CONFIG_MVEBU_MBUS) += mvebu-mbus.o +#CDX bus +obj-$(CONFIG_CDX_BUS) += cdx/ + # Interconnect bus driver for OMAP SoCs. obj-$(CONFIG_OMAP_INTERCONNECT) += omap_l3_smx.o omap_l3_noc.o diff --git a/drivers/bus/cdx/Kconfig b/drivers/bus/cdx/Kconfig new file mode 100644 index 000000000000..ae3f2ee5a768 --- /dev/null +++ b/drivers/bus/cdx/Kconfig @@ -0,0 +1,7 @@ +config CDX_BUS + bool "CDX Bus platform driver" + help + Driver to enable CDX Bus infrastructure. CDX bus is + capable of scanning devices dynamically, supporting + rescanning of dynamically added, removed or updated + devices. diff --git a/drivers/bus/cdx/Makefile b/drivers/bus/cdx/Makefile new file mode 100644 index 000000000000..c9cee5b6fa8a --- /dev/null +++ b/drivers/bus/cdx/Makefile @@ -0,0 +1,3 @@ +obj-$(CONFIG_CDX_BUS) += cdx-bus-device-driver.o + +cdx-bus-device-driver-objs := cdx.o diff --git a/drivers/bus/cdx/cdx.c b/drivers/bus/cdx/cdx.c new file mode 100644 index 000000000000..f28329770af8 --- /dev/null +++ b/drivers/bus/cdx/cdx.c @@ -0,0 +1,241 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Platform driver for CDX bus. + * + * Copyright(C) 2022 Xilinx Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cdx.h" + +static struct cdx_device_types_t dev_types[MAX_CDX_DEVICE_TYPES] = { + {"cdx-cdma-1.0", "xlnx,cdx-cdma-1.0"} +}; + +static int cdx_populate_one(struct platform_device *pdev_parent, + struct cdx_dev_params_t *dev_params) +{ + struct platform_device *new_pdev; + struct fwnode_handle *swnode; + struct platform_device_info pdevinfo; + struct cdx_device_data dev_data; + int ret = 0; + struct property_entry port_props[] = { + PROPERTY_ENTRY_STRING("compatible", + dev_types[dev_params->dev_type_idx].compat), + { } + }; + + swnode = fwnode_create_software_node(port_props, NULL); + if (IS_ERR(swnode)) { + ret = PTR_ERR(swnode); + dev_err(&pdev_parent->dev, + "fwnode_create_software_node() failed: %d\n", ret); + goto out; + } + + dev_data.bus_id = dev_params->bus_id; + dev_data.func_id = dev_params->func_id; + + memset(&pdevinfo, 0, sizeof(pdevinfo)); + pdevinfo.fwnode = swnode; + pdevinfo.parent = &pdev_parent->dev; + pdevinfo.name = dev_params->name; + pdevinfo.id = (dev_params->bus_id << 16) | (dev_params->func_id); + pdevinfo.res = dev_params->res; + pdevinfo.num_res = dev_params->res_cnt; + pdevinfo.data = &dev_data; + pdevinfo.size_data = sizeof(struct cdx_device_data); + pdevinfo.dma_mask = DMA_BIT_MASK(64); + new_pdev = platform_device_register_full(&pdevinfo); + if (IS_ERR(new_pdev)) { + ret = PTR_ERR(new_pdev); + dev_err(&pdev_parent->dev, + "platform_device_register_full() failed: %d\n", ret); + goto out; + } + + /* Configure the IOMMU */ + ret = of_dma_configure_id(&new_pdev->dev, pdev_parent->dev.of_node, + 1, &dev_params->stream_id); + if (ret) { + if (ret != -EPROBE_DEFER) + dev_err(&pdev_parent->dev, + "of_dma_configure_id() failed: %d\n", ret); + goto out; + } + + return 0; + +out: + if (new_pdev != NULL && !IS_ERR(new_pdev)) + platform_device_unregister(new_pdev); + + if (swnode != NULL && IS_ERR(swnode)) + fwnode_remove_software_node(swnode); + + return ret; +} + +static int cdx_unregister_device(struct device *dev, + void * __always_unused data) +{ + struct platform_device *pdev = to_platform_device(dev); + + platform_device_unregister(pdev); + fwnode_remove_software_node(pdev->dev.fwnode); + + return 0; +} + +void cdx_unregister_devices(struct device *parent_dev) +{ + device_for_each_child(parent_dev, NULL, cdx_unregister_device); +} + +static int cdx_bus_device_discovery(struct platform_device *pdev) +{ + int num_cdx_bus = 0, num_cdx_func = 0; + int bus_id = 0, func_id = 0; + struct device_node *np = pdev->dev.of_node; + int ret; + + /* TODO: Get number of busses from firmware */ + num_cdx_bus = 1; + + for (bus_id = 0; bus_id < num_cdx_bus; bus_id++) { + /* TODO: Get number of functions/devices on the bus + * from firmware + */ + num_cdx_func = 1; + + for (func_id = 0; func_id < num_cdx_func; func_id++) { + struct cdx_dev_params_t dev_params; + u64 mmio_size; /* MMIO size */ + u64 mmio_addr; /* MMIO address */ + u32 req_id; /* requester ID */ + + /* TODO: Read device configuration from the firmware + * and remove the hardcoded configuration parameters. + */ + mmio_addr = 0xe4020000; + mmio_size = 0x1000; + req_id = 0x250; + + memset(&dev_params, 0, sizeof(dev_params)); + + /* Populate device parameters */ + ret = of_map_id(np, req_id, "iommu-map", "iommu-map-mask", + NULL, &dev_params.stream_id); + if (ret != 0) { + dev_err(&pdev->dev, + "of_map_id failed for IOMMU: %d\n", + ret); + goto fail; + } + + dev_params.dev_type_idx = 0; + dev_params.res_cnt = 1; + + /* Populate dev_type_idx */ + dev_params.dev_type_idx = 0; + + /* Populate resource */ + dev_params.res->start = (u64)mmio_addr; + dev_params.res->end = (u64)(mmio_addr + mmio_size - 1); + dev_params.res->flags = IORESOURCE_MEM; + + dev_params.bus_id = bus_id; + dev_params.func_id = func_id; + + strncpy(dev_params.name, dev_types[dev_params.dev_type_idx].name, + sizeof(dev_params.name)); + + ret = cdx_populate_one(pdev, &dev_params); + if (ret == -EPROBE_DEFER) { + goto fail; + } else if (ret) { + dev_err(&pdev->dev, + "registering cdx dev: %d failed: %d\n", + func_id, ret); + goto fail; + } else { + dev_info(&pdev->dev, + "CDX dev: %d on cdx bus: %d created\n", + func_id, bus_id); + } + } + } + + return 0; +fail: + cdx_unregister_devices(&pdev->dev); + return ret; +} + +static int cdx_probe(struct platform_device *pdev) +{ + int ret; + + /* TODO: Firmware path initialization */ + + ret = cdx_bus_device_discovery(pdev); + if (ret) + return ret; + + return 0; +} + +static void cdx_shutdown(struct platform_device *pdev) +{ + /* TODO: add shutdown for CDX bus*/ +} + +static int cdx_remove(struct platform_device *pdev) +{ + /* TODO: add remove of CDX bus */ + return 0; +} + +static const struct of_device_id cdx_match_table[] = { + {.compatible = "xlnx,cdxbus-controller-1.0",}, + { }, +}; + +MODULE_DEVICE_TABLE(of, cdx_match_table); + +static struct platform_driver cdx_driver = { + .driver = { + .name = "cdx-bus", + .pm = NULL, + .of_match_table = cdx_match_table, + }, + .probe = cdx_probe, + .remove = cdx_remove, + .shutdown = cdx_shutdown, +}; + +static int __init cdx_driver_init(void) +{ + int error; + + error = platform_driver_register(&cdx_driver); + if (error < 0) { + pr_err("platform_driver_register() failed: %d\n", error); + return error; + } + + return 0; +} +postcore_initcall(cdx_driver_init); diff --git a/drivers/bus/cdx/cdx.h b/drivers/bus/cdx/cdx.h new file mode 100644 index 000000000000..7db8b06de9cd --- /dev/null +++ b/drivers/bus/cdx/cdx.h @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Header file for the CDX Bus + * + * Copyright(c) 2022 Xilinx Inc. + */ + +#ifndef _CDX_H_ +#define _CDX_H_ + +#define CDX_DEV_NUM_RESOURCES 4 +#define CDX_NAME_LEN 64 + +struct cdx_dev_params_t { + char name[CDX_NAME_LEN]; + u32 bus_id; + u32 func_id; + u32 dev_type_idx; + struct resource res[CDX_DEV_NUM_RESOURCES]; + int res_cnt; + u32 stream_id; +}; + +/** + * struct cdx_device_data_t - private data associated with the + * CDX device. + * @bus_id: Bus ID for reset + * @func_id: Function ID for reset + */ +struct cdx_device_data { + u32 bus_id; + u32 func_id; +}; + +#endif /* _CDX_H_ */ diff --git a/include/linux/cdx/cdx_bus.h b/include/linux/cdx/cdx_bus.h new file mode 100644 index 000000000000..7c6ad7dfe97a --- /dev/null +++ b/include/linux/cdx/cdx_bus.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * CDX bus public interface + * + * Copyright(C) 2022 Xilinx Inc. + * + */ +#ifndef _CDX_BUS_H_ +#define _CDX_BUS_H_ + +#define MAX_CDX_DEVICE_TYPES 16 +#define MAX_CDX_COMPAT_LEN 64 +#define MAX_CDX_NAME_LEN 64 + +/** + * struct cdx_device_type_t - info on CDX devices type. + * @compatible: Describes the specific binding, to which + * the devices of a particular type complies. It is used + * for driver binding. + */ +struct cdx_device_types_t { + char name[MAX_CDX_NAME_LEN]; + char compat[MAX_CDX_COMPAT_LEN]; +}; + +#endif /* _CDX_H_ */ -- 2.25.1