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Message-ID: <ddbcd90419e9bb4ce7c5b7b3055ee3227c179321.camel@pengutronix.de>
Subject: Re: [PATCH v3 1/6] reset: imx7: Add the iMX8MP PCIe PHY PERST
 support
From:   Philipp Zabel <p.zabel@pengutronix.de>
To:     Richard Zhu <hongxing.zhu@nxp.com>, l.stach@pengutronix.de,
        bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh@kernel.org,
        shawnguo@kernel.org, vkoul@kernel.org,
        alexander.stein@ew.tq-group.com, marex@denx.de
Cc:     linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
        linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, kernel@pengutronix.de,
        linux-imx@nxp.com
Date:   Thu, 18 Aug 2022 10:50:53 +0200
In-Reply-To: <1660806153-29001-2-git-send-email-hongxing.zhu@nxp.com>
References: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com>
         <1660806153-29001-2-git-send-email-hongxing.zhu@nxp.com>
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Hi Richard,

On Do, 2022-08-18 at 15:02 +0800, Richard Zhu wrote:
> On i.MX7/iMX8MM/iMX8MQ, the initialized default value of PERST bit(BIT3)
> of SRC_PCIEPHY_RCR is 1b'1.
> But i.MX8MP has one inversed default value 1b'0 of PERST bit.
> 
> And the PERST bit should be kept 1b'1 after power and clocks are stable.
> So add the i.MX8MP PCIe PHY PERST support here.

the description is good now. It would be nice if this could also be
mentioned in the Reference Manual.

Please replace "add" with "fix" in the subject, as I requested earlier:
"reset: imx7: Fix i.MX8MP PCIe PHY PERST support".

And add a fixes line:

Fixes: e08672c03981 ("reset: imx7: Add support for i.MX8MP SoC")

With those two changes,
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

regards
Philipp