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mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from CO1PR11MB4820.namprd11.prod.outlook.com (2603:10b6:303:6f::8) by CH2PR11MB4407.namprd11.prod.outlook.com (2603:10b6:610:47::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5546.16; Thu, 18 Aug 2022 08:54:56 +0000 Received: from CO1PR11MB4820.namprd11.prod.outlook.com ([fe80::fcda:4c77:5786:209c]) by CO1PR11MB4820.namprd11.prod.outlook.com ([fe80::fcda:4c77:5786:209c%4]) with mapi id 15.20.5546.016; Thu, 18 Aug 2022 08:54:55 +0000 Message-ID: <7408156a-f708-5e73-d0a2-69b1acca9b96@intel.com> Date: Thu, 18 Aug 2022 16:54:44 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Firefox/91.0 Thunderbird/91.12.0 Subject: Re: [PATCH 4/6] mm: hugetlb_vmemmap: add missing smp_wmb() before set_pte_at() Content-Language: en-US To: Muchun Song CC: Miaohe Lin , Andrew Morton , Mike Kravetz , "Muchun Song" , Linux MM , References: <20220816130553.31406-1-linmiaohe@huawei.com> <20220816130553.31406-5-linmiaohe@huawei.com> <0EAF1279-6A1C-41FA-9A32-414C36B3792A@linux.dev> <019c1272-9d01-9d51-91a0-2d656b25c318@intel.com> <18adbf89-473e-7ba6-9a2b-522e1592bdc6@huawei.com> <9c791de0-b702-1bbe-38a4-30e87d9d1b95@intel.com> <931536E2-3948-40AB-88A7-E36F67954AAA@linux.dev> <7be98c64-88a1-3bee-7f92-67bb1f4f495b@huawei.com> <3B1463C2-9DC4-43D0-93EC-2D2334A20502@linux.dev> <7fa5b2b2-dcef-f264-7932-c4fdbb9619d0@intel.com> From: "Yin, Fengwei" In-Reply-To: Content-Type: text/plain; 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>>>>>>>>> IIUC, the case here we should make sure others (CPUs) can see new page’s >>>>>>>>> contents after they have saw PG_uptodate is set. I think commit 0ed361dec369 >>>>>>>>> can tell us more details. >>>>>>>>> >>>>>>>>> I also looked at commit 52f37629fd3c to see why we need a barrier before >>>>>>>>> set_pte_at(), but I didn’t find any info to explain why. I guess we want >>>>>>>>> to make sure the order between the page’s contents and subsequent memory >>>>>>>>> accesses using the corresponding virtual address, do you agree with this? >>>>>>>> This is my understanding also. Thanks. >>>>>>> That's also my understanding. Thanks both. >>>>>> I have an unclear thing (not related with this patch directly): Who is response >>>>>> for the read barrier in the read side in this case? >>>>>> >>>>>> For SetPageUptodate, there are paring write/read memory barrier. >>>>>> >>>>> >>>>> I have the same question. So I think the example proposed by Miaohe is a little >>>>> difference from the case (hugetlb_vmemmap) here. >>>> >>>> Per my understanding, memory barrier in PageUptodate() is needed because user might access the >>>> page contents using page_address() (corresponding pagetable entry already exists) soon. But for >>>> the above proposed case, if user wants to access the page contents, the corresponding pagetable >>>> should be visible first or the page contents can't be accessed. So there should be a data dependency >>>> acting as memory barrier between pagetable entry is loaded and page contents is accessed. >>>> Or am I miss something? >>> >>> Yep, it is a data dependency. The difference between hugetlb_vmemmap and PageUptodate() is that >>> the page table (a pointer to the mapped page frame) is loaded by MMU while PageUptodate() is >>> loaded by CPU. Seems like the data dependency should be inserted between the MMU access and the CPU >>> access. Maybe it is hardware’s guarantee? >> I just found the comment in pmd_install() explained why most arch has no read > > I think pmd_install() is a little different as well. We should make sure the > page table walker (like GUP) see the correct PTE entry after they see the pmd > entry. The difference I can see is that pmd/pte thing has both hardware page walker and software page walker (like GUP) as read side. While the case here only has hardware page walker as read side. But I suppose the memory barrier requirement still apply here. Maybe we could do a test: add large delay between reset_struct_page() and set_pte_at? Regards Yin, Fengwei > >> side memory barrier except alpha which has read side memory barrier. > > Right. Only alpha has data dependency barrier. > >> >> >> Regards >> Yin, Fengwei >> >>> >>>> >>>> Thanks, >>>> Miaohe Lin >