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[2620:137:e000::1:20]) by mx.google.com with ESMTP id qf21-20020a1709077f1500b0073072967073si876350ejc.606.2022.08.18.03.18.43; Thu, 18 Aug 2022 03:19:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237526AbiHRJsS (ORCPT + 99 others); Thu, 18 Aug 2022 05:48:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50590 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243699AbiHRJsP (ORCPT ); Thu, 18 Aug 2022 05:48:15 -0400 Received: from mout.kundenserver.de (mout.kundenserver.de [212.227.126.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0A45F65C6; Thu, 18 Aug 2022 02:48:13 -0700 (PDT) Received: from mail-ej1-f48.google.com ([209.85.218.48]) by mrelayeu.kundenserver.de (mreue011 [213.165.67.97]) with ESMTPSA (Nemesis) id 1MKsSj-1o43VZ0ZRt-00LFLV; Thu, 18 Aug 2022 11:48:12 +0200 Received: by mail-ej1-f48.google.com with SMTP id kb8so2256226ejc.4; Thu, 18 Aug 2022 02:48:12 -0700 (PDT) X-Gm-Message-State: ACgBeo3Y6LIhLufd6ui+RCDqzYDSpHbbfr09PKsC9WYrCdvpR02KjaS3 2vsRxUW4YhXjwtr/mo7odY8hb52K/1AhiXsA1CI= X-Received: by 2002:a17:907:28d6:b0:731:5d0:4401 with SMTP id en22-20020a17090728d600b0073105d04401mr1389787ejc.765.1660816091708; Thu, 18 Aug 2022 02:48:11 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Arnd Bergmann Date: Thu, 18 Aug 2022 11:47:55 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] gpio: Allow user to customise maximum number of GPIOs To: Linus Walleij Cc: Christophe Leroy , Bartosz Golaszewski , Jonathan Corbet , Russell King , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "H. Peter Anvin" , Arnd Bergmann , "open list:GPIO SUBSYSTEM" , "open list:DOCUMENTATION" , open list , "moderated list:ARM PORT" , "open list:GENERIC INCLUDE/ASM HEADER FILES" Content-Type: text/plain; charset="UTF-8" X-Provags-ID: V03:K1:Qu+gtjF6iRfgG51X3I8WKus/80sjc+ma+ip40I5uAgSgDb0BTGO TmFn0AU3ikFHSV4I9Ec3FQ9dAV0Z88se1kzFaPV08lpOg1XP5++JC1HfdsoScPzy7KITPvy NmPvyZ9GZGz5qgXyk8l4vyLeLBcGJIm80XSBI43QjAhGoBz0DfqSeGZG/tUnSxP+jsii0qp QG5mTzs0HgzuaGdF4ZLwg== X-UI-Out-Filterresults: notjunk:1;V03:K0:VpH2Lv+xf5w=:aM/CNwGcX5Slxtx5waR3G4 7Tpne+m8lwx2GQRxSnQiezYPR9OWTcCIW7FrDJoWRPYoyNRxBy1WaCywmApG+jHhFK+z+000s Se3f8j5GO70OjLQs6j2qFrB8jQ/MwvTpXKiHyNjfhX9PEBu3uYfzd7Djl1t/nQrQz2DpqwayM KBcEiiDysR5auhNB/3De0UbANOyeJhbNkaiyBPjKFc8y3J2zIAcFN8rwI0wcbf/nezOj6GBIo gLPjN3U3rcFqarARQHBKBFduwUJC47zl9aEGsFiZm0CUUtJxSvVsbw1mJwIPe7sUUuAJOn1Nk GEnFwRZ116/LKkToyI9XfyA8V9yQ4ODKGsjOyZ00oSQiprd11VwGT69JkMu7buwb8GTyqKW9+ 4K9SOUHpw1PEvCgiddEgfyH9oDouXKwFVxpXHl5xLLttjz8kf6gJSKiVunmlZ7Z5e1WO4hLvI 7R7shfvl6CFaXcHF7yxQs0rmHR8aqprXugEc1iDWXqc/Tu36U+xh/txCpEEfU7CF8aM9nX3gA I/+L04K4h/Sj8U+smwSsOv2B54CVQLg1H1cTqgcYfr74qESpb3vWCB8YW2QuETz4JdfxSnn6m ncYQMrJB0zyeUviYI7GxVgS+I6khh8XfSxpINLcF7BDQgwWi2HrHFnMRR9cn6Xdiop/x6rzzv 8RUQD/4SzoCuC8T81Q6G3dkum0mtZiq8wLqJMGTsVScIZOVuy/xOiF0Mq4v+62rXfwv90iq5i MYvvQRSdH8x9lZ5uI61N0xQZxZUyDdjpGpsUXTCK1ah4zZRBq/4qumNvbkbmMc3BKOzbksO2i l0RZfY6UdayMF2sg2w6kYiIHglc2osO6WF6GQVZD+DiAuzlTA0fnk5f2ptyy2qNEzZOkeOvkT Ttyhsg4PyEVe/OMd6Kig== X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Aug 18, 2022 at 11:33 AM Linus Walleij wrote: > > The per-arch GPIO number only exist for one reason: embedded > GPIOs (think SoC:s) that refer to fixed numbers in numberspace in > the board support code. This makes it necessary to allocate > descriptors up front in some compiled-in GPIO chips. As I understood, the problem that Christophe ran into is that the dynamic registration of additional gpio chips is broken because it unregisters the chip if the number space is exhausted: base = gpiochip_find_base(gc->ngpio); if (base < 0) { ret = base; spin_unlock_irqrestore(&gpio_lock, flags); goto err_free_label; } From the git history, it looks like this error was never handled gracefully even if the intention was to keep going without a number assignment, so there are probably other bugs one runs into after changing this. Arnd