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Message-ID: <212924d309cb8594fc61e1c5bb2ad07d5bb9312d.camel@collabora.com>
Subject: Re: [PATCH v1 3/3] media: cedrus: Fix endless loop in
 cedrus_h265_skip_bits()
From:   Nicolas Dufresne <nicolas.dufresne@collabora.com>
To:     Dmitry Osipenko <dmitry.osipenko@collabora.com>,
        linux-media@vger.kernel.org, Maxime Ripard <mripard@kernel.org>,
        Paul Kocialkowski <paul.kocialkowski@bootlin.com>,
        Mauro Carvalho Chehab <mchehab@kernel.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        Chen-Yu Tsai <wens@csie.org>,
        Jernej Skrabec <jernej.skrabec@gmail.com>,
        Samuel Holland <samuel@sholland.org>
Cc:     kernel@collabora.com, stable@vger.kernel.org,
        linux-staging@lists.linux.dev,
        linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev,
        linux-kernel@vger.kernel.org
Date:   Thu, 18 Aug 2022 17:17:02 -0400
In-Reply-To: <2182ae07-4c0a-5937-7acc-3fad68d28baa@collabora.com>
References: <20220818203308.439043-1-nicolas.dufresne@collabora.com>
         <20220818203308.439043-4-nicolas.dufresne@collabora.com>
         <2182ae07-4c0a-5937-7acc-3fad68d28baa@collabora.com>
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Le jeudi 18 ao=C3=BBt 2022 =C3=A0 23:39 +0300, Dmitry Osipenko a =C3=A9crit=
=C2=A0:
> On 8/18/22 23:33, Nicolas Dufresne wrote:
> > From: Dmitry Osipenko <dmitry.osipenko@collabora.com>
> >=20
> > The busy status bit may never de-assert if number of programmed skip
> > bits is incorrect, resulting in a kernel hang because the bit is polled
> > endlessly in the code. Fix it by adding timeout for the bit-polling.
> > This problem is reproducible by setting the data_bit_offset field of
> > the HEVC slice params to a wrong value by userspace.
> >=20
> > Cc: stable@vger.kernel.org
> > Reported-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
> > Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
> > Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
> > ---
> >  drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> >=20
> > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers=
/staging/media/sunxi/cedrus/cedrus_h265.c
> > index f703c585d91c5..f0bc118021b0a 100644
> > --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
> > +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
> > @@ -227,6 +227,7 @@ static void cedrus_h265_pred_weight_write(struct ce=
drus_dev *dev,
> >  static void cedrus_h265_skip_bits(struct cedrus_dev *dev, int num)
> >  {
> >  	int count =3D 0;
> > +	u32 reg;
>=20
> This "reg" variable isn't needed anymore after switching to
> cedrus_wait_for(). Sorry, I missed it :)

Good catch thanks, will fix.

>=20
> >  	while (count < num) {
> >  		int tmp =3D min(num - count, 32);
> > @@ -234,8 +235,9 @@ static void cedrus_h265_skip_bits(struct cedrus_dev=
 *dev, int num)
> >  		cedrus_write(dev, VE_DEC_H265_TRIGGER,
> >  			     VE_DEC_H265_TRIGGER_FLUSH_BITS |
> >  			     VE_DEC_H265_TRIGGER_TYPE_N_BITS(tmp));
> > -		while (cedrus_read(dev, VE_DEC_H265_STATUS) & VE_DEC_H265_STATUS_VLD=
_BUSY)
> > -			udelay(1);
> > +
> > +		if (cedrus_wait_for(dev, VE_DEC_H265_STATUS, VE_DEC_H265_STATUS_VLD_=
BUSY))
> > +			dev_err_ratelimited(dev->dev, "timed out waiting to skip bits\n");
> > =20
> >  		count +=3D tmp;
> >  	}
>=20
>=20