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Date:   Thu, 18 Aug 2022 16:01:48 -0700 (PDT)
Subject:     Re: [PATCH] perf: riscv legacy: fix kerneldoc comment warning
In-Reply-To: <20220812143532.1962623-1-conor.dooley@microchip.com>
CC:     atishp@atishpatra.org, anup@brainfault.org,
        Will Deacon <will@kernel.org>, mark.rutland@arm.com,
        Paul Walmsley <paul.walmsley@sifive.com>,
        aou@eecs.berkeley.edu, linux-riscv@lists.infradead.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        conor.dooley@microchip.com
From:   Palmer Dabbelt <palmer@rivosinc.com>
To:     conor.dooley@microchip.com
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On Fri, 12 Aug 2022 07:35:32 PDT (-0700), conor.dooley@microchip.com wrote:
> Fix the warning:
> drivers/perf/riscv_pmu_legacy.c:76: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
>
> Fixes: 9b3e150e310e ("RISC-V: Add a simple platform driver for RISC-V legacy perf")
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  drivers/perf/riscv_pmu_legacy.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/perf/riscv_pmu_legacy.c b/drivers/perf/riscv_pmu_legacy.c
> index 342778782359..2c20b0de8cb0 100644
> --- a/drivers/perf/riscv_pmu_legacy.c
> +++ b/drivers/perf/riscv_pmu_legacy.c
> @@ -72,7 +72,7 @@ static void pmu_legacy_ctr_start(struct perf_event *event, u64 ival)
>  	local64_set(&hwc->prev_count, initial_val);
>  }
>
> -/**
> +/*
>   * This is just a simple implementation to allow legacy implementations
>   * compatible with new RISC-V PMU driver framework.
>   * This driver only allows reading two counters i.e CYCLE & INSTRET.

Thanks, this is on riscv/fixes -- given how trivial the actual diff is 
I'm OK just taking it without the Ack/Review from anyone else, doubly so 
because I probably broke it the first place.