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Date:   Fri, 19 Aug 2022 15:28:09 +0100
From:   Mark Brown <broonie@kernel.org>
To:     Shreeya Patel <shreeya.patel@collabora.com>
Cc:     sanju.mehta@amd.com, linux-spi@vger.kernel.org,
        linux-kernel@vger.kernel.org, kernel@collabora.com,
        krisman@collabora.com, alvaro.soliverez@collabora.com,
        Lucas Tanure <tanureal@opensource.cirrus.com>
Subject: Re: [PATCH v2] spi: amd: Configure device speed
Message-ID: <Yv+d+byNXO3z9JaF@sirena.org.uk>
References: <20220819123630.368462-1-shreeya.patel@collabora.com>
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On Fri, Aug 19, 2022 at 06:06:30PM +0530, Shreeya Patel wrote:
> From: Lucas Tanure <tanureal@opensource.cirrus.com>
>=20
> Number of clock frequencies are supported by AMD controller
> which are mentioned in the amd_spi_freq structure table.
>=20
> Create mechanism to configure device clock frequency such
> that it is strictly less than the requested frequency.

This doesn't apply against current code, please check and resend.

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