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Date:   Fri, 19 Aug 2022 17:34:31 -0700
From:   Andrew Morton <akpm@linux-foundation.org>
To:     Bharata B Rao <bharata@amd.com>
Cc:     "Aneesh Kumar K.V" <aneesh.kumar@linux.ibm.com>,
        linux-mm@kvack.org, Wei Xu <weixugc@google.com>,
        Huang Ying <ying.huang@intel.com>,
        Yang Shi <shy828301@gmail.com>,
        Davidlohr Bueso <dave@stgolabs.net>,
        Tim C Chen <tim.c.chen@intel.com>,
        Michal Hocko <mhocko@kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        Hesham Almatary <hesham.almatary@huawei.com>,
        Dave Hansen <dave.hansen@intel.com>,
        Jonathan Cameron <Jonathan.Cameron@huawei.com>,
        Alistair Popple <apopple@nvidia.com>,
        Dan Williams <dan.j.williams@intel.com>,
        Johannes Weiner <hannes@cmpxchg.org>, jvgediya.oss@gmail.com
Subject: Re: [PATCH v15 00/10] mm/demotion: Memory tiers and demotion
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On Fri, 19 Aug 2022 11:57:18 +0530 Bharata B Rao <bharata@amd.com> wrote:

> > The kernel initialization code makes the decision on which exact tier a memory
> > node should be assigned to based on the requests from the device drivers as well
> > as the memory device hardware information provided by the firmware.
> 
> I gave this patchset a quick try on two setups:
> 
> 1. With QEMU, when an nvdimm device is bound to dax kmem driver, I can see
> the memory node with pmem getting into a lower tier than DRAM.
> 
> 2. In an experimental CXL setup that has DRAM as part of CXL memory, I see that
> CXL memory node falls into the same tier as the regular DRAM tier. This is
> expected for now since there is no code (in low level ACPI driver?) yet to
> map the latency or bandwidth info (when available from firmware) into an
> abstract distance value, and register a memory type for the same. Guess these
> bits can be covered as part of future enhancements.

Should I add your Tested-by:?