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[209.85.128.170]) by smtp.gmail.com with ESMTPSA id n18-20020a05620a295200b006b9593e2f68sm6496432qkp.4.2022.08.20.05.07.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 20 Aug 2022 05:07:40 -0700 (PDT) Received: by mail-yw1-f170.google.com with SMTP id 00721157ae682-3376851fe13so149793297b3.6; Sat, 20 Aug 2022 05:07:39 -0700 (PDT) X-Received: by 2002:a81:f47:0:b0:31f:434b:5ee with SMTP id 68-20020a810f47000000b0031f434b05eemr12132492ywp.383.1660997259528; Sat, 20 Aug 2022 05:07:39 -0700 (PDT) MIME-Version: 1.0 References: <20220815151451.23293-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20220815151451.23293-6-prabhakar.mahadev-lad.rj@bp.renesas.com> <47cec683-dc17-7aa2-3511-b0244020d571@microchip.com> In-Reply-To: <47cec683-dc17-7aa2-3511-b0244020d571@microchip.com> From: Geert Uytterhoeven Date: Sat, 20 Aug 2022 14:07:28 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 5/8] riscv: dts: renesas: Add initial devicetree for Renesas RZ/Five SoC To: Conor Dooley Cc: "Lad, Prabhakar" , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Geert Uytterhoeven , Anup Patel , Linux-Renesas , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , linux-riscv , Linux Kernel Mailing List , Prabhakar Lad , Biju Das Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Conor, On Sat, Aug 20, 2022 at 10:49 AM wrote: > On 20/08/2022 09:45, Geert Uytterhoeven wrote: > > On Fri, Aug 19, 2022 at 8:40 PM wrote: > >> On 15/08/2022 16:14, Lad Prabhakar wrote: > >>> Add initial device tree for Renesas RZ/Five RISC-V CPU Core (AX45MP > >>> Single). > >>> > >>> Below is the list of IP blocks added in the initial SoC DTSI which can be > >>> used to boot via initramfs on RZ/Five SMARC EVK: > >>> - AX45MP CPU > >>> - CPG > >>> - PINCTRL > >>> - PLIC > >>> - SCIF0 > >>> - SYSC > >>> > >>> Signed-off-by: Lad Prabhakar > >> That aside, by convention so far we have put things like extals or > >> reference clocks below the /cpus node. Could you do the same here too > >> please? > > > > Really? We've been putting them at the root node for a long time, > > since the separate "clocks" grouping subnode was deprecated. > > The extal-clk is not even part of the SoC, so it should definitely > > not be under the /cpus node. > > Under may have been a confusing choice of words, I meant "physically" > under it in the file. Maybe after would have been a better choice of > words? I wasn't suggesting you put it inside the CPUs node. > Does that make more sense? Oh right, you mean the order of the nodes. Yes, "extal-clk" should be after "cpus", following alphabetical sort order, as the nodes have no unit addresses. Sorry for missing that in my review. I also misread "below" (in Dutch there is only a single word for "below" and "under" ;-) Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds