Received: by 2002:a05:6358:5282:b0:b5:90e7:25cb with SMTP id g2csp686905rwa; Sat, 20 Aug 2022 11:50:57 -0700 (PDT) X-Google-Smtp-Source: AA6agR4cMiO4CulXhCDIrW/omiS+F3iM+4d80oYn0I7edpu1GnEssjYRZ62frcn5VRhdfWNyeNaZ X-Received: by 2002:a05:6402:254b:b0:43e:910f:caea with SMTP id l11-20020a056402254b00b0043e910fcaeamr10624730edb.423.1661021457769; Sat, 20 Aug 2022 11:50:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661021457; cv=none; d=google.com; s=arc-20160816; b=AqCHIIaXZrq0Eeu5jlUCZQFmGE68YXSGobLEWNmJFtKiNspqp5zvGK/2/HTXp/Fqed dHVkDrD40CRl1pWgxCnoe3bvPOS9EHLIV/1DA05GhmaLUWYSPSBaBZJEtEL8zZGCldIc TeVtlAF4fttZbdhmV4k0ERvmg9fbHX9VOWHUCxtWYQQRQu2UmPyoeU+qkFAjb8R+YX0L 0IQTt9LuiMjeUVNyJRluvaXxl6ACqcb9CnNCFs3Dn5XnYsxTP4Q+rtbEj+vR99Nxhjgv xNIfusEirYFQ55vwPHmYQNXrNxujdIVJtpNy9yDoS8KwLZ08tfTwIohlZVrkqPBweWon 13eg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=Fap6JIYMdWXN0zZpRYLSvtD5yGfzaSQ75IJSrYc0Zzs=; b=vTLJb5WPowb12M4ACRXqsQ0sGTWYdXF4O9cxZ0quoXy+D2ChOfc3gz+GLXDXj7+1bI mUiw8IRunP2hVqb3VuBfUxoM6X0iJGgpdP5e1TBKh5PLt8EuChtsormAwFgTo7eoygPo Y4wfecdWsy024v35LZzoLKK6ksc/CTwsto3M3+77q4pfuLFy7l7r1pdOcv+q7LH8+IvN Al14H/jH1/TnTlGYNR3reEjJC05od/qmgf0P+j1SR1D7ICFtJzTnlX44760AKB7YPr0h PEA/lzv/rHzC6FOnATX7zicw9t+YxKAYnz2Lo6Z+LPetkvbSHXS1CyrtCUmxsxDPrmqP QSqg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=49j5uThb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id y2-20020a056402440200b0043d5bcf8553si7076629eda.95.2022.08.20.11.50.31; Sat, 20 Aug 2022 11:50:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@lunn.ch header.s=20171124 header.b=49j5uThb; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231648AbiHTSsy (ORCPT + 99 others); Sat, 20 Aug 2022 14:48:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36950 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229854AbiHTSst (ORCPT ); Sat, 20 Aug 2022 14:48:49 -0400 Received: from vps0.lunn.ch (vps0.lunn.ch [185.16.172.187]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E977C46220; Sat, 20 Aug 2022 11:48:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=Fap6JIYMdWXN0zZpRYLSvtD5yGfzaSQ75IJSrYc0Zzs=; b=49j5uThbtvoOljoIvu6795+v0G CzSrZg5zpjOpInLpKXf4meJciv0KYDepJXg8M9JZmjjZdvaffsi6YqYairWD3eCf1ixihM/ex2jbv tzNGyxwqUXjmRIt4fYKBRXgwWaPAqzMECcATf9nbmhvzCvjOIjgmR8Ll9ukrpAsnd9f4=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1oPTWM-00E3pD-1M; Sat, 20 Aug 2022 20:48:34 +0200 Date: Sat, 20 Aug 2022 20:48:34 +0200 From: Andrew Lunn To: Oleksij Rempel Cc: Heiner Kallweit , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , Rob Herring , Krzysztof Kozlowski , Jonathan Corbet , kernel@pengutronix.de, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org, David Jander Subject: Re: [PATCH net-next v1 7/7] ethtool: add interface to interact with Ethernet Power Equipment Message-ID: References: <20220819120109.3857571-1-o.rempel@pengutronix.de> <20220819120109.3857571-8-o.rempel@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220819120109.3857571-8-o.rempel@pengutronix.de> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > +static int pse_get_pse_attributs(struct net_device *dev, > + struct pse_reply_data *data) > +{ > + struct phy_device *phydev = dev->phydev; > + int ret; > + > + if (!phydev) > + return -EOPNOTSUPP; > + > + mutex_lock(&phydev->lock); > + if (!phydev->psec) { > + ret = -EOPNOTSUPP; > + goto error_unlock; > + } > + > + ret = pse_podl_get_admin_sate(phydev->psec); > + if (ret < 0) > + goto error_unlock; The locking is triggering all sorts of questions in my mind... I don't have the answers yet, so consider this more a discussion. You need somewhere to place the psec. Since we are talking power over copper lines, there will be some sort of PHY, so phydev->psec seems reasonable. However, there is a general trend of moving all DSA Ethernet switches to phylink, which is going to make this a bit tricker to actually get to the phydev object. But using phydev->lock? Humm. At least in the PoE world, there seems to be lots of I2C or SPI controllers. Why hold the phydev lock when performing an I2C transaction? You have a generic linux regulator driver. How would you see a generic C45.2.9 driver? If it calls in the PHY driver, the lock is already held, and we have to be careful to not deadlock. I'm more thinking along the lines of psec should have a lock of its own. pse_podl_get_admin_state(), pse_podl_get_pw_d_status() etc should take that mutex before calling to the actual driver. For a PHY which actually supports C45.2.9, i hope that the phylib core looks at the phy driver structure, sees that some pse_podl ops are implemented, and instantiates and registers a psec object. The phylib core provides wrappers, which take the phylib lock before calling into the driver. And if the PHY strictly follows C45.2.9, the calls are actually into phylib helpers. Otherwise the PHY driver can do its own implementation. Andrew