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From:   Huacai Chen <chenhuacai@kernel.org>
Date:   Mon, 22 Aug 2022 10:19:22 +0800
Message-ID: <CAAhV-H5_bZa2oi6ZSvoMwz8FmJGL8+pg7iYjkT90YT6XTCNb5Q@mail.gmail.com>
Subject: Re: [PATCH] LoongArch: Use TLB for ioremap()
To:     Christoph Hellwig <hch@infradead.org>
Cc:     Huacai Chen <chenhuacai@loongson.cn>,
        Arnd Bergmann <arnd@arndb.de>, loongarch@lists.linux.dev,
        linux-arch <linux-arch@vger.kernel.org>,
        Xuefeng Li <lixuefeng@loongson.cn>,
        Guo Ren <guoren@kernel.org>, Xuerui Wang <kernel@xen0n.name>,
        Jiaxun Yang <jiaxun.yang@flygoat.com>,
        LKML <linux-kernel@vger.kernel.org>
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Hi, Christoph

On Sun, Aug 21, 2022 at 9:23 PM Christoph Hellwig <hch@infradead.org> wrote:
>
> On Mon, Aug 15, 2022 at 08:46:12PM +0800, Huacai Chen wrote:
> > We can support more cache attributes (CC, SUC and WUC) and page
> > protection when we use TLB for ioremap().
>
> Please build this on top of the series that extents the generic ioremap
> code for these use cases instead of duplicating the generic ioremap
> code.
OK, let me try, thanks.

Huacai
>