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Date:   Mon, 22 Aug 2022 11:40:14 +0300
From:   Dan Carpenter <dan.carpenter@oracle.com>
To:     kbuild@lists.01.org, Qin Jian <qinjian@cqplus1.com>,
        sboyd@kernel.org
Cc:     lkp@intel.com, kbuild-all@lists.01.org, mturquette@baylibre.com,
        linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org,
        Qin Jian <qinjian@cqplus1.com>
Subject: Re: [PATCH] clk: Add Sunplus SP7021 clock driver
Message-ID: <202208212144.aUofUlUt-lkp@intel.com>
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Hi Qin,

url:    https://github.com/intel-lab-lkp/linux/commits/Qin-Jian/clk-Add-Sunplus-SP7021-clock-driver/20220817-151010
base:   568035b01cfb107af8d2e4bd2fb9aea22cf5b868
config: arm64-randconfig-m031-20220821 (https://download.01.org/0day-ci/archive/20220821/202208212144.aUofUlUt-lkp@intel.com/config)
compiler: aarch64-linux-gcc (GCC) 12.1.0

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>

smatch warnings:
drivers/clk/clk-sp7021.c:171 plltv_integer_div() error: buffer overflow 'm_table' 19 <= 19 (assuming for loop doesn't break)

vim +171 drivers/clk/clk-sp7021.c

5673230d6a56d6 Qin Jian 2022-08-17  145  static long plltv_integer_div(struct sp_pll *clk, unsigned long freq)
5673230d6a56d6 Qin Jian 2022-08-17  146  {
5673230d6a56d6 Qin Jian 2022-08-17  147  	/* valid m values: 27M must be divisible by m */
5673230d6a56d6 Qin Jian 2022-08-17  148  	static const u32 m_table[] = {
5673230d6a56d6 Qin Jian 2022-08-17  149  		1, 2, 3, 4, 5, 6, 8, 9, 10, 12, 15, 16, 18, 20, 24, 25, 27, 30, 32
5673230d6a56d6 Qin Jian 2022-08-17  150  	};
5673230d6a56d6 Qin Jian 2022-08-17  151  	u32 m, n, r;
5673230d6a56d6 Qin Jian 2022-08-17  152  	unsigned long fvco, nf;
5673230d6a56d6 Qin Jian 2022-08-17  153  	long ret;
5673230d6a56d6 Qin Jian 2022-08-17  154  
5673230d6a56d6 Qin Jian 2022-08-17  155  	freq = clamp(freq, F_MIN, F_MAX);
5673230d6a56d6 Qin Jian 2022-08-17  156  
5673230d6a56d6 Qin Jian 2022-08-17  157  	/* DIVR 0~3 */
5673230d6a56d6 Qin Jian 2022-08-17  158  	for (r = 0; r <= 3; r++) {
5673230d6a56d6 Qin Jian 2022-08-17  159  		fvco = freq << r;
5673230d6a56d6 Qin Jian 2022-08-17  160  		if (fvco <= FVCO_MAX)
5673230d6a56d6 Qin Jian 2022-08-17  161  			break;
5673230d6a56d6 Qin Jian 2022-08-17  162  	}
5673230d6a56d6 Qin Jian 2022-08-17  163  
5673230d6a56d6 Qin Jian 2022-08-17  164  	/* DIVM */
5673230d6a56d6 Qin Jian 2022-08-17  165  	for (m = 0; m < ARRAY_SIZE(m_table); m++) {
5673230d6a56d6 Qin Jian 2022-08-17  166  		nf = fvco * m_table[m];
5673230d6a56d6 Qin Jian 2022-08-17  167  		n = nf / F_27M;
5673230d6a56d6 Qin Jian 2022-08-17  168  		if ((n * F_27M) == nf)
5673230d6a56d6 Qin Jian 2022-08-17  169  			break;
5673230d6a56d6 Qin Jian 2022-08-17  170  	}
5673230d6a56d6 Qin Jian 2022-08-17 @171  	m = m_table[m];
                                                ^^^^^^^^^^^^^^^
If we know the for loop is going to break then why bother with a limit?

5673230d6a56d6 Qin Jian 2022-08-17  172  
5673230d6a56d6 Qin Jian 2022-08-17  173  	if (!m) {
5673230d6a56d6 Qin Jian 2022-08-17  174  		ret = -EINVAL;
5673230d6a56d6 Qin Jian 2022-08-17  175  		goto err_not_found;
5673230d6a56d6 Qin Jian 2022-08-17  176  	}
5673230d6a56d6 Qin Jian 2022-08-17  177  
5673230d6a56d6 Qin Jian 2022-08-17  178  	/* save parameters */
5673230d6a56d6 Qin Jian 2022-08-17  179  	clk->p[SEL_FRA] = 0;
5673230d6a56d6 Qin Jian 2022-08-17  180  	clk->p[DIVR]    = r;
5673230d6a56d6 Qin Jian 2022-08-17  181  	clk->p[DIVN]    = n;
5673230d6a56d6 Qin Jian 2022-08-17  182  	clk->p[DIVM]    = m;
5673230d6a56d6 Qin Jian 2022-08-17  183  
5673230d6a56d6 Qin Jian 2022-08-17  184  	return freq;
5673230d6a56d6 Qin Jian 2022-08-17  185  
5673230d6a56d6 Qin Jian 2022-08-17  186  err_not_found:
5673230d6a56d6 Qin Jian 2022-08-17  187  	pr_err("%s: %s freq:%lu not found a valid setting\n",
5673230d6a56d6 Qin Jian 2022-08-17  188  	       __func__, clk_hw_get_name(&clk->hw), freq);
5673230d6a56d6 Qin Jian 2022-08-17  189  
5673230d6a56d6 Qin Jian 2022-08-17  190  	return ret;
5673230d6a56d6 Qin Jian 2022-08-17  191  }

-- 
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