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From:   <Conor.Dooley@microchip.com>
To:     <geert@linux-m68k.org>
CC:     <andre.przywara@arm.com>, <devicetree@vger.kernel.org>,
        <aou@eecs.berkeley.edu>, <samuel@sholland.org>,
        <linux-kernel@vger.kernel.org>, <jernej.skrabec@gmail.com>,
        <prabhakar.mahadev-lad.rj@bp.renesas.com>, <wens@csie.org>,
        <robh+dt@kernel.org>, <palmer@dabbelt.com>,
        <krzysztof.kozlowski+dt@linaro.org>, <paul.walmsley@sifive.com>,
        <linux-riscv@lists.infradead.org>, <linux-sunxi@lists.linux.dev>
Subject: Re: [PATCH 06/12] riscv: dts: allwinner: Add the D1 SoC base
 devicetree
Thread-Topic: [PATCH 06/12] riscv: dts: allwinner: Add the D1 SoC base
 devicetree
Thread-Index: AQHYsGUwgMumzpPtekanQb2zMhKHQ62v8GmAgABAKYCAB+IqgIAAATuAgADecICAADeqgIABrtyAgAAHcYCAAAUagIAAF5yA
Date:   Mon, 22 Aug 2022 13:56:27 +0000
Message-ID: <44b6f601-1a11-aacf-5592-5b61550afb9f@microchip.com>
References: <20220815050815.22340-1-samuel@sholland.org>
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