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[66.90.144.107]) by smtp.gmail.com with ESMTPSA id s63-20020aca4542000000b00342df642fd3sm2735031oia.48.2022.08.22.12.40.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 12:40:43 -0700 (PDT) Received: (nullmailer pid 413610 invoked by uid 1000); Mon, 22 Aug 2022 19:40:42 -0000 From: Rob Herring To: Conor Dooley Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Turquette , linux-riscv@lists.infradead.org, Palmer Dabbelt , Stephen Boyd , Albert Ou , Rob Herring , Hugh Breslin , Krzysztof Kozlowski , Paul Walmsley , linux-clk@vger.kernel.org, Daire McNamara In-Reply-To: <20220822112928.2727437-3-conor.dooley@microchip.com> References: <20220822112928.2727437-1-conor.dooley@microchip.com> <20220822112928.2727437-3-conor.dooley@microchip.com> Subject: Re: [PATCH v2 2/6] dt-bindings: clk: document PolarFire SoC fabric clocks Date: Mon, 22 Aug 2022 14:40:42 -0500 Message-Id: <1661197242.557172.413609.nullmailer@robh.at.kernel.org> X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 22 Aug 2022 12:29:25 +0100, Conor Dooley wrote: > On PolarFire SoC there are 4 PLL/DLL blocks, located in each of the > ordinal corners of the chip, which our documentation refers to as > "Clock Conditioning Circuitry". PolarFire SoC is an FPGA, these are > highly configurable & many of the input clocks are optional. > > Signed-off-by: Conor Dooley > --- > .../bindings/clock/microchip,mpfs-ccc.yaml | 81 +++++++++++++++++++ > 1 file changed, 81 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.example.dtb: clock-controller@38100000: 'clock-output-names' is a required property From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.