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Date:   Mon, 22 Aug 2022 16:42:43 -0500
From:   Rob Herring <robh@kernel.org>
To:     Siddharth Vadapalli <s-vadapalli@ti.com>
Cc:     robh+dt@kernel.org, nsekhar@ti.com,
        krzysztof.kozlowski+dt@linaro.org, pabeni@redhat.com,
        netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
        davem@davemloft.net, kishon@ti.com, vladimir.oltean@nxp.com,
        devicetree@vger.kernel.org, grygorii.strashko@ti.com,
        vigneshr@ti.com, kuba@kernel.org, edumazet@google.com,
        krzysztof.kozlowski@linaro.org, linux@armlinux.org.uk
Subject: Re: [PATCH v5 1/3] dt-bindings: net: ti: k3-am654-cpsw-nuss: Update
 bindings for J7200 CPSW5G
Message-ID: <20220822214243.GA905400-robh@kernel.org>
References: <20220822070125.28236-1-s-vadapalli@ti.com>
 <20220822070125.28236-2-s-vadapalli@ti.com>
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On Mon, 22 Aug 2022 12:31:23 +0530, Siddharth Vadapalli wrote:
> Update bindings for TI K3 J7200 SoC which contains 5 ports (4 external
> ports) CPSW5G module and add compatible for it.
> 
> Changes made:
>     - Add new compatible ti,j7200-cpswxg-nuss for CPSW5G.
>     - Extend pattern properties for new compatible.
>     - Change maximum number of CPSW ports to 4 for new compatible.
> 
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
> ---
>  .../bindings/net/ti,k3-am654-cpsw-nuss.yaml    | 18 ++++++++++++++++--
>  1 file changed, 16 insertions(+), 2 deletions(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>