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From:   Miles Chen <miles.chen@mediatek.com>
To:     <xinlei.lee@mediatek.com>
CC:     <Project_Global_Chrome_Upstream_Group@mediatek.com>,
        <devicetree@vger.kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
        <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>,
        <linux-mediatek@lists.infradead.org>, <linux-pwm@vger.kernel.org>,
        <matthias.bgg@gmail.com>, <robh+dt@kernel.org>,
        <thierry.reding@gmail.com>, <u.kleine-koenig@pengutronix.de>
Subject: Re: [PATCH,2/2] pwm: mtk-disp: Fix the parameters calculated by the enabled flag of disp_pwm.
Date:   Tue, 23 Aug 2022 17:26:15 +0800
Message-ID: <20220823092615.1765-1-miles.chen@mediatek.com>
In-Reply-To: <1661239875-19841-3-git-send-email-xinlei.lee@mediatek.com>
References: <1661239875-19841-3-git-send-email-xinlei.lee@mediatek.com>
MIME-Version: 1.0
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> In the original mtk_disp_pwm_get_state() function, the result of reading
> con0 & BIT(0) is enabled as disp_pwm. 
> In order to conform to the register table, we should use the disp_pwm 
> base address as the enabled judgment.
> 
> Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API .get_state()")
> Signed-off-by: xinlei lee <xinlei.lee@mediatek.com>
> ---
>  drivers/pwm/pwm-mtk-disp.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c
> index c605013e4114..50425cd1de61 100644
> --- a/drivers/pwm/pwm-mtk-disp.c
> +++ b/drivers/pwm/pwm-mtk-disp.c
> @@ -197,7 +197,7 @@ static void mtk_disp_pwm_get_state(struct pwm_chip *chip,
>  	rate = clk_get_rate(mdp->clk_main);
>  	con0 = readl(mdp->base + mdp->data->con0);
>  	con1 = readl(mdp->base + mdp->data->con1);
> -	state->enabled = !!(con0 & BIT(0));
> +	state->enabled = !!(readl(mdp->base) & BIT(0));
>  	clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0);
>  	period = FIELD_GET(PWM_PERIOD_MASK, con1);
>  	/*

Reviewed-by: Miles Chen <miles.chen@mediatek.com>