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From:   Lorenzo Pieralisi <lpieralisi@kernel.org>
To:     Robin Murphy <robin.murphy@arm.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
        =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>,
        =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>
Cc:     Lorenzo Pieralisi <lpieralisi@kernel.org>,
        linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] PCI: mvebu: Fix endianity when accessing pci emul bridge members
Date:   Tue, 23 Aug 2022 12:23:40 +0200
Message-Id: <166125018774.51610.7934595303191264022.b4-ty@kernel.org>
In-Reply-To: <20220812141115.24082-1-pali@kernel.org>
References: <20220812094058.16141-1-pali@kernel.org> <20220812141115.24082-1-pali@kernel.org>
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On Fri, 12 Aug 2022 16:11:15 +0200, Pali Rohár wrote:
> PCI emul bridge members iolimitupper, iobaseupper, memlimit and membase are
> of type __le16, so correctly access these members via le16_to_cpu() macros.
> 
> 

Applied to pci/mvebu, thanks!

[1/1] PCI: mvebu: Fix endianity when accessing pci emul bridge members
      https://git.kernel.org/lpieralisi/pci/c/2e379ac66d4b

Thanks,
Lorenzo