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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: SJ0PR12MB5676.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0cbdf542-9fec-4a8a-aca9-08da852c47b3 X-MS-Exchange-CrossTenant-originalarrivaltime: 23 Aug 2022 17:24:05.3890 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: +L5Lre5S8vTPJ71HsQmipbYtvyL8pjbwUUs8MhYfymy87MOqhsVMkTn0zI0pu512q5kz6NC6i44OAYRmQle0Mg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB2933 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, SPF_HELO_PASS,SPF_NONE,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Reviewers, Could we get some comments for this patchset ? Or an estimate when this could get your review is greatly appreciated. Regards, Besar > -----Original Message----- > From: Besar Wicaksono > Sent: Sunday, August 14, 2022 1:24 PM > To: suzuki.poulose@arm.com; robin.murphy@arm.com; > catalin.marinas@arm.com; will@kernel.org; mark.rutland@arm.com > Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > linux-tegra@vger.kernel.org; sudeep.holla@arm.com; > thanu.rangarajan@arm.com; Michael.Williams@arm.com; Thierry Reding > ; Jonathan Hunter ; Vikram > Sethi ; mathieu.poirier@linaro.org; > mike.leach@linaro.org; leo.yan@linaro.org; Besar Wicaksono > > Subject: [PATCH v4 0/2] perf: ARM CoreSight PMU support >=20 > Add driver support for ARM CoreSight PMU device and event attributes for > NVIDIA > implementation. The code is based on ARM Coresight PMU architecture and > ACPI ARM > Performance Monitoring Unit table (APMT) specification below: > * ARM Coresight PMU: > https://developer.arm.com/documentation/ihi0091/latest > * APMT: https://developer.arm.com/documentation/den0117/latest >=20 > The patchset applies on top of > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git > master next-20220524 >=20 > For APMT support, please see patchset: > https://lkml.org/lkml/2022/4/19/1395 >=20 > Changes from v3: > * Driver is now probing "arm-cs-arch-pmu" device. > * The driver files, directory, functions are renamed with "arm_cspmu" > prefix. > * Use Kconfig ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU. > * Add kernel doc for NVIDIA Uncore PMU. > * Use GENMASK and FIELD_GET macros everywhere. > Thanks to suzuki.poulose@arm.com and will@kernel.org for the review > comments. > v3: https://lore.kernel.org/linux-arm-kernel/20220621055035.31766-1- > bwicaksono@nvidia.com/ >=20 > Changes from v2: > * Driver is now probing "arm-system-pmu" device. > * Change default PMU naming to "arm__pmu". > * Add implementor ops to generate custom name. > Thanks to suzuki.poulose@arm.com for the review comments. > v2: https://lore.kernel.org/linux-arm-kernel/20220515163044.50055-1- > bwicaksono@nvidia.com/ >=20 > Changes from v1: > * Remove CPU arch dependency. > * Remove 32-bit read/write helper function and just use read/writel. > * Add .is_visible into event attribute to filter out cycle counter event= . > * Update pmiidr matching. > * Remove read-modify-write on PMCR since the driver only writes to > PMCR.E. > * Assign default cycle event outside the 32-bit PMEVTYPER range. > * Rework the active event and used counter tracking. > Thanks to robin.murphy@arm.com for the review comments. > v1: https://lore.kernel.org/linux-arm-kernel/20220509002810.12412-1- > bwicaksono@nvidia.com/ >=20 > Besar Wicaksono (2): > perf: arm_cspmu: Add support for ARM CoreSight PMU driver > perf: arm_cspmu: Add support for NVIDIA SCF and MCF attribute >=20 > Documentation/admin-guide/perf/index.rst | 1 + > Documentation/admin-guide/perf/nvidia-pmu.rst | 120 ++ > arch/arm64/configs/defconfig | 1 + > drivers/perf/Kconfig | 2 + > drivers/perf/Makefile | 1 + > drivers/perf/arm_cspmu/Kconfig | 13 + > drivers/perf/arm_cspmu/Makefile | 7 + > drivers/perf/arm_cspmu/arm_cspmu.c | 1269 +++++++++++++++++ > drivers/perf/arm_cspmu/arm_cspmu.h | 151 ++ > drivers/perf/arm_cspmu/nvidia_cspmu.c | 367 +++++ > drivers/perf/arm_cspmu/nvidia_cspmu.h | 17 + > 11 files changed, 1949 insertions(+) > create mode 100644 Documentation/admin-guide/perf/nvidia-pmu.rst > create mode 100644 drivers/perf/arm_cspmu/Kconfig > create mode 100644 drivers/perf/arm_cspmu/Makefile > create mode 100644 drivers/perf/arm_cspmu/arm_cspmu.c > create mode 100644 drivers/perf/arm_cspmu/arm_cspmu.h > create mode 100644 drivers/perf/arm_cspmu/nvidia_cspmu.c > create mode 100644 drivers/perf/arm_cspmu/nvidia_cspmu.h >=20 >=20 > base-commit: 09ce5091ff971cdbfd67ad84dc561ea27f10d67a > -- > 2.17.1