Received: by 2002:a05:6358:45e:b0:b5:b6eb:e1f9 with SMTP id 30csp377694rwe; Wed, 24 Aug 2022 02:33:05 -0700 (PDT) X-Google-Smtp-Source: AA6agR4ymTMSGy+Q48bcoln7XaJSCuzLETekTsz/07vaHCyfai74UDxDJs7IaJBRRMO4H/9YTDUU X-Received: by 2002:a17:906:9be1:b0:73d:2bba:ca08 with SMTP id de33-20020a1709069be100b0073d2bbaca08mr2362581ejc.224.1661333584883; Wed, 24 Aug 2022 02:33:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1661333584; cv=none; d=google.com; s=arc-20160816; b=F6355F6/0BglzaF3jX767CBl9nfZjE3r09SWiYhSm3wLIab79FnoiKWkCp0wEJd0ii WF2P6yyWZQ/bW3WUBCF6rhfOJhu4heyxW2WZgrtzo42IsDtUXgeIeB/fVsqT4577KthJ bZa28zaPXX+grcxdcvlimp09B43ogR6u4QiemGFZNcdkr1LmFh7fLO4sMd3wWIOVWM0U DJPmv6JB4hm92Im87hWzzcv3t9R/ivjNINkZQAIjU6jPhAIvPS5wLtoC05E3qwmFxUG1 zUI23VtEw2fDt2fkS2ZZEw6HFgIXt2SCuw3XlOdlCi03O1Fg7RERlv9O5ANVcjdYt2wW dRZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Isros38E78qGAuTIJnE+At6c7a/IYgdjwD+5NDamL+Q=; b=H9JbcMzrq1m8GdvTGXZioUNNHSlVhIdOUkjLXuqA/GwT4bhNPuXf/x828JxooClJfj sGVSOdgGw9NxecxtD8alpbZxArfmVd3v3dh3gUEmB/HiCy0wkWQY9vKfA917P+rWELV1 8mc1MwxGMq/ZS/1Idi4oK+oDAE5WJXHH0Ssn5Hpu1yXHpbpYsk+sU/lSfs3rU7fuf3o+ kV2CUFu7FxUt4+z2igas/mfwmcvRtVBrulY16CiDk1yPNcWGUfDCViR2c1+VEy3ipYoz r7/rWMG2kXFotOQnbWdxV2ph8Wj0OeJ4Z/CqBXTnVvR5d24bddZgVVF//tPbFvM2HSLR WOuQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b="rLi/mOPa"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id eb7-20020a0564020d0700b0043c06c2cfdesi3863433edb.571.2022.08.24.02.32.39; Wed, 24 Aug 2022 02:33:04 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b="rLi/mOPa"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235974AbiHXJMr (ORCPT + 99 others); Wed, 24 Aug 2022 05:12:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235404AbiHXJMl (ORCPT ); Wed, 24 Aug 2022 05:12:41 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 96A5047BB6; Wed, 24 Aug 2022 02:12:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1661332361; x=1692868361; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UGvCmSdLGhHwliGLCezI146iFxUX+rnhWkr8xC90Ykk=; b=rLi/mOPacN7Ek6zUB0QXxyLptagNVofzKG5H8uobFmgv6qJBMftuzA30 lsD7UkYaIIFJsM5wx3JfDU1INaEEGADq5LBom3/eTo5Twuy+NvsKjYSJE OY4Np44VbTNAeUfK6T8BlWw1TCxfwp0qKp02t+PfQYF8Pg4KSqHsAWT5v dWnnunIzT5CYd6YzefEQswLoyuUzBqfOSAA9EOpjWLIoSaD6kpYshU7Ub /ILcMeWAYu1z5BHAfMErz8mOShcdvrBg/7Fi4ww+yPV5m8IFMXESkYELE ApvL3b2qXGrqPOuCoG5ovgmexByO+fgU7tjhK26/0jxXYEqDBz2gJniFL g==; X-IronPort-AV: E=Sophos;i="5.93,260,1654585200"; d="scan'208";a="187831730" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 24 Aug 2022 02:12:39 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Wed, 24 Aug 2022 02:12:38 -0700 Received: from wendy.microchip.com (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Wed, 24 Aug 2022 02:12:36 -0700 From: Conor Dooley To: Thierry Reding , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= , "Rob Herring" , Krzysztof Kozlowski CC: Daire McNamara , , , , , Conor Dooley , Rob Herring Subject: [PATCH v10 1/4] dt-bindings: pwm: fix microchip corePWM's pwm-cells Date: Wed, 24 Aug 2022 10:12:12 +0100 Message-ID: <20220824091215.141577-2-conor.dooley@microchip.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220824091215.141577-1-conor.dooley@microchip.com> References: <20220824091215.141577-1-conor.dooley@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org corePWM is capable of inverted operation but the binding requires \#pwm-cells of 2. Expand the binding to support setting the polarity. Fixes: df77f7735786 ("dt-bindings: pwm: add microchip corepwm binding") Acked-by: Rob Herring Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml index a7fae1772a81..cd8e9a8907f8 100644 --- a/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml +++ b/Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml @@ -30,7 +30,9 @@ properties: maxItems: 1 "#pwm-cells": - const: 2 + enum: [2, 3] + description: + The only flag supported by the controller is PWM_POLARITY_INVERTED. microchip,sync-update-mask: description: | -- 2.36.1