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From:   Lorenzo Pieralisi <lpieralisi@kernel.org>
To:     Rob Herring <robh@kernel.org>,
        =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>,
        Bjorn Helgaas <bhelgaas@google.com>,
        =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>
Cc:     Lorenzo Pieralisi <lpieralisi@kernel.org>,
        Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
        linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
        =?UTF-8?q?Marek=20Beh=C3=BAn?= <kabel@kernel.org>
Subject: Re: [PATCH v3] PCI: pci-bridge-emul: Set position of PCI capabilities to real HW value
Date:   Thu, 25 Aug 2022 12:09:54 +0200
Message-Id: <166142217602.128276.10729379597803060542.b4-ty@kernel.org>
In-Reply-To: <20220824112124.21675-1-pali@kernel.org>
References: <20220703104627.27058-1-pali@kernel.org> <20220824112124.21675-1-pali@kernel.org>
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On Wed, 24 Aug 2022 13:21:24 +0200, Pali Rohár wrote:
> mvebu and aardvark HW have PCIe capabilities on different offset in PCI
> config space. Extend pci-bridge-emul.c code to allow setting custom driver
> custom value where PCIe capabilities starts.
> 
> With this change PCIe capabilities of both drivers are reported at the same
> location as where they are reported by U-Boot - in their real HW offset.
> 
> [...]

Applied to pci/bridge-emul, thanks!

[1/1] PCI: pci-bridge-emul: Set position of PCI capabilities to real HW value
      https://git.kernel.org/lpieralisi/pci/c/658aea35ab88

Thanks,
Lorenzo