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From:   <Divya.Koppera@microchip.com>
To:     <andrew@lunn.ch>
CC:     <hkallweit1@gmail.com>, <linux@armlinux.org.uk>,
        <davem@davemloft.net>, <edumazet@google.com>, <kuba@kernel.org>,
        <pabeni@redhat.com>, <netdev@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <UNGLinuxDriver@microchip.com>
Subject: RE: [PATCH net-next] net: phy: micrel: Adding SQI support for lan8814
 phy
Thread-Topic: [PATCH net-next] net: phy: micrel: Adding SQI support for
 lan8814 phy
Thread-Index: AQHYuFmMgzj2knw/J0+AGHw88JSECa3AKZiAgABiu9A=
Date:   Fri, 26 Aug 2022 03:50:44 +0000
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References: <20220825080549.9444-1-Divya.Koppera@microchip.com>
 <YwfvaSFejdtPtZgK@lunn.ch>
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Hi,

> -----Original Message-----
> From: Andrew Lunn <andrew@lunn.ch>
> Sent: Friday, August 26, 2022 3:24 AM
> To: Divya Koppera - I30481 <Divya.Koppera@microchip.com>
> Cc: hkallweit1@gmail.com; linux@armlinux.org.uk; davem@davemloft.net;
> edumazet@google.com; kuba@kernel.org; pabeni@redhat.com;
> netdev@vger.kernel.org; linux-kernel@vger.kernel.org; UNGLinuxDriver
> <UNGLinuxDriver@microchip.com>
> Subject: Re: [PATCH net-next] net: phy: micrel: Adding SQI support for
> lan8814 phy
>=20
> EXTERNAL EMAIL: Do not click links or open attachments unless you know th=
e
> content is safe
>=20
> > +#define LAN8814_DCQ_CTRL                             0xe6
> > +#define LAN8814_DCQ_CTRL_READ_CAPTURE_                       BIT(15)
> > +#define LAN8814_DCQ_CTRL_CHANNEL_MASK                        GENMASK(1=
,
> 0)
> > +#define LAN8814_DCQ_SQI                                      0xe4
> > +#define LAN8814_DCQ_SQI_MAX                          7
> > +#define LAN8814_DCQ_SQI_VAL_MASK                     GENMASK(3, 1)
> > +
> >  static int lanphy_read_page_reg(struct phy_device *phydev, int page,
> > u32 addr)  {
> >       int data;
> > @@ -2927,6 +2934,32 @@ static int lan8814_probe(struct phy_device
> *phydev)
> >       return 0;
> >  }
> >
> > +static int lan8814_get_sqi(struct phy_device *phydev) {
> > +     int rc, val;
> > +
> > +     val =3D lanphy_read_page_reg(phydev, 1, LAN8814_DCQ_CTRL);
> > +     if (val < 0)
> > +             return val;
>=20
> I just took a quick look at the datasheet. It says:
>=20

I'm not sure the datasheet you looked into is the right one. Could you plea=
se crosscheck if its lan8814 or lan8841.
Lan8814 is quad port phy where register access are of extended page. Lan884=
1 is 1 port phy where register access are mmd access.

> All registers references in this section are in MMD Device Address 1
>=20
> So you should be using phy_read_mmd(phydev, MDIO_MMD_PMAPMD,
> xxx) to read/write these registers. The datasheet i have however is missi=
ng
> the register map, so i've no idea if it is still 0xe6.
>=20

I hope above explanation gives answer.

>     Andrew