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From:   Alexander Stein <alexander.stein@ew.tq-group.com>
To:     Richard Zhu <hongxing.zhu@nxp.com>
Cc:     p.zabel@pengutronix.de, l.stach@pengutronix.de,
        bhelgaas@google.com, lorenzo.pieralisi@arm.com, robh@kernel.org,
        shawnguo@kernel.org, vkoul@kernel.org, marex@denx.de,
        linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
        linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
        linux-kernel@vger.kernel.org, kernel@pengutronix.de,
        linux-imx@nxp.com
Subject: Re: [PATCH v3 0/6] Add the iMX8MP PCIe support
Date:   Fri, 26 Aug 2022 08:22:25 +0200
Message-ID: <4384717.iIbC2pHGDl@steina-w>
Organization: TQ-Systems GmbH
In-Reply-To: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com>
References: <1660806153-29001-1-git-send-email-hongxing.zhu@nxp.com>
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Am Donnerstag, 18. August 2022, 09:02:27 CEST schrieb Richard Zhu:
> Based on the 6.0-rc1 of the pci/next branch.
> This series adds the i.MX8MP PCIe support and had been tested on i.MX8MP
> EVK board when one PCIe NVME device is used.
> 
> - i.MX8MP PCIe has reversed initial PERST bit value refer to
> i.MX8MQ/i.MX8MM. Add the PHY PERST explicitly for i.MX8MP PCIe PHY.
> - Add the i.MX8MP PCIe PHY support in the i.MX8M PCIe PHY driver.
>   And share as much as possible codes with i.MX8MM PCIe PHY.
> - Add the i.MX8MP PCIe support in binding document, DTS files, and PCIe
>   driver.
> 
> Main changes v2-->v3:
> - Fix the schema checking error in the PHY dt-binding patch.
> - Inspired by Lucas, the PLL configurations might not required when
>   external OSC is used as PCIe referrence clock. It's true. Remove all
>   the HSIO PLL bit manipulations, and PCIe works fine on i.MX8MP EVK board
>   with one NVME device is used.
> - Drop the #4 patch of v2, since it had been applied by Rob.
> 
> Main changes v1-->v2:
> - It's my fault forget including Vinod, re-send v2 after include Vinod
>   and linux-phy@lists.infradead.org.
> - List the basements of this patch-set. The branch, codes changes and so on.
> - Clean up some useless register and bit definitions in #3 patch.
> 
> Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml |  16 +++++++--
> arch/arm64/boot/dts/freescale/imx8mp-evk.dts                 |  53
> +++++++++++++++++++++++++++++ arch/arm64/boot/dts/freescale/imx8mp.dtsi    
>                |  46 ++++++++++++++++++++++++-
> drivers/pci/controller/dwc/pci-imx6.c                        |  17
> +++++++++- drivers/phy/freescale/phy-fsl-imx8m-pcie.c                   |
> 150
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------
> ------- drivers/reset/reset-imx7.c                                   |   1 +
> 6 files changed, 232 insertions(+), 51 deletions(-)
> 
>  [PATCH v3 1/6] reset: imx7: Add the iMX8MP PCIe PHY PERST support
>  [PATCH v3 2/6] dt-binding: phy: Add iMX8MP PCIe PHY binding
>  [PATCH v3 3/6] phy: freescale: imx8m-pcie: Add iMX8MP PCIe PHY
>  [PATCH v3 4/6] arm64: dts: imx8mp: add the iMX8MP PCIe support
>  [PATCH v3 5/6] arm64: dts: imx8mp-evk: Add PCIe support
>  [PATCH v3 6/6] PCI: imx6: Add the iMX8MP PCIe support

On TQMa8MPxl + MBa8MPxL:
Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>