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[82.131.98.15]) by smtp.gmail.com with ESMTPSA id x27-20020a19e01b000000b00492b679d5aesm273544lfg.81.2022.08.26.00.00.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 26 Aug 2022 00:00:33 -0700 (PDT) Message-ID: Date: Fri, 26 Aug 2022 10:00:31 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: Re: [PATCH v2] dt-bindings: arm: mediatek: mmsys: change compatible for MT8195 Content-Language: en-US To: Bo-Chen Chen , Matthias Brugger , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" Cc: =?UTF-8?B?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= , =?UTF-8?B?TmFuY3kgTGluICjmnpfmrKPonqIp?= , =?UTF-8?B?Q0sgSHUgKOiDoeS/iuWFiSk=?= , "chunkuang.hu@kernel.org" , "angelogioacchino.delregno@collabora.com" , "hsinyi@google.com" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-mediatek@lists.infradead.org" , Project_Global_Chrome_Upstream_Group References: <20220825091448.14008-1-rex-bc.chen@mediatek.com> <3ed3d73a-1671-708e-7c42-498cca6aaf1d@gmail.com> <8f3dba943170361211d9bb4c8bf1be12bbfdec20.camel@mediatek.com> From: Krzysztof Kozlowski In-Reply-To: <8f3dba943170361211d9bb4c8bf1be12bbfdec20.camel@mediatek.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 26/08/2022 05:07, Bo-Chen Chen wrote: > On Thu, 2022-08-25 at 22:57 +0800, Matthias Brugger wrote: >> >> On 25/08/2022 11:14, Bo-Chen Chen wrote: >>> From: "Jason-JH.Lin" >>> >>> For previous MediaTek SoCs, such as MT8173, there are 2 display HW >>> pipelines binding to 1 mmsys with the same power domain, the same >>> clock driver and the same mediatek-drm driver. >>> >>> For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding >>> to >>> 2 different power domains, different clock drivers and different >>> mediatek-drm drivers. >>> >>> Moreover, Hardware pipeline of VDOSYS0 has these components: COLOR, >>> CCORR, AAL, GAMMA, DITHER. They are related to the PQ (Picture >>> Quality) >>> and they makes VDOSYS0 supports PQ function while they are not >>> including in VDOSYS1. >>> >>> Hardware pipeline of VDOSYS1 has the component ETHDR (HDR related >>> component). It makes VDOSYS1 supports the HDR function while it's >>> not >>> including in VDOSYS0. >>> >>> To summarize0: >>> Only VDOSYS0 can support PQ adjustment. >>> Only VDOSYS1 can support HDR adjustment. >>> >>> Therefore, we need to separate these two different mmsys hardwares >>> to >>> 2 different compatibles for MT8195. >>> >>> Fixes: 81c5a41d10b9 ("dt-bindings: arm: mediatek: mmsys: add mt8195 >>> SoC binding") >>> Signed-off-by: Jason-JH.Lin >>> Signed-off-by: Bo-Chen Chen >>> --- >>> Changes for v2: >>> 1. Add hardware difference for VDOSYS0 and VDOSYS1 in commit >>> message. >>> --- >>> .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | >>> 3 ++- >>> 1 file changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git >>> a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam >>> l >>> b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam >>> l >>> index 6ad023eec193..bfbdd30d2092 100644 >>> --- >>> a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam >>> l >>> +++ >>> b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yam >>> l >>> @@ -31,7 +31,8 @@ properties: >>> - mediatek,mt8183-mmsys >>> - mediatek,mt8186-mmsys >>> - mediatek,mt8192-mmsys >>> - - mediatek,mt8195-mmsys >>> + - mediatek,mt8195-vdosys0 >> >> Thanks for you patch. As I mentioned on v1, I propose to set >> mediatek,mt8195-mmsys as fallback for mediatek,mt8195-vdosys0 to not >> break >> backwards compatibility. >> >> Apart from that, the binding change will need some changes to support >> the new >> binding. Please provide these together with this patch. >> >> Regards, >> Matthias >> > > Hello Matthias, > > Thanks for your comments. > The purpose of this patch is to confirm we can separate mt8195 mmsys > into two compatibles. I think this modification is accepted. No, it is not accepted following Matthias comments. You received my ack based on assumption that ABI break is perfectly ok for platform maintainer, as he has decisive voice. If anyone is not happy with a ABI break, then his concerns must be addressed. So let it be specific: NAK. > > After this, I think Jason-JH will push another series with this binding > patch. I don't know what do you mean here - another series on top of wrong patch? > In Jason-JH's series, we will modify mmsys driver based on this. > And I think we don't need to keep "mediatek,mt8195-mmsys" if we also > modify mmsys drivers in the same series. This does not fux ABI break and broken bisectability. > > Is it ok that postpones to pick this patch until we finish review > follow-up series? > No. You got a clear review to fix. Best regards, Krzysztof