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[209.85.221.47]) by smtp.gmail.com with ESMTPSA id kz18-20020a17090777d200b0073dbaeb50f6sm1086104ejc.169.2022.08.26.10.20.10 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 26 Aug 2022 10:20:11 -0700 (PDT) Received: by mail-wr1-f47.google.com with SMTP id u5so2533025wrt.11 for ; Fri, 26 Aug 2022 10:20:10 -0700 (PDT) X-Received: by 2002:a5d:4052:0:b0:225:8b55:67fd with SMTP id w18-20020a5d4052000000b002258b5567fdmr354955wrp.281.1661534410125; Fri, 26 Aug 2022 10:20:10 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Linus Torvalds Date: Fri, 26 Aug 2022 10:19:53 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3] wait_on_bit: add an acquire memory barrier To: Mikulas Patocka Cc: Alan Stern , Andrea Parri , Will Deacon , Peter Zijlstra , Boqun Feng , Nicholas Piggin , David Howells , Jade Alglave , Luc Maranget , "Paul E. McKenney" , Akira Yokosawa , Daniel Lustig , Joel Fernandes , linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Aug 26, 2022 at 9:45 AM Linus Torvalds wrote: > > So narrowing the load is fine (but you generally never want to narrow > a *store*, because that results in huge problems with subsequent wider > loads). .. so making that statement made me go look around, and it's exactly what we use for clear_bit() on x86. Which is actually ok too, because it's a locked operation, and at that point the whole "store buffer forwarding" issue pretty much goes out the window anyway. But because I looked at where the new test_bit_acquire() triggers and where there are other bitops around it, I found this beauty in fs/buffer.c: clean_bdev_aliases(): if (!buffer_mapped(bh) || (bh->b_blocknr < block)) goto next; if (bh->b_blocknr >= block + len) break; clear_buffer_dirty(bh); wait_on_buffer(bh); clear_buffer_req(bh); where it basically works on four different bits (buffer_mapped, dirty, lock, req) right next to each other. That code sequence really doesn't matter, but it was interesting seeing the generated code. Not pretty, but the ugliest part was actually how the might_sleep() calls in those helper functions result in __cond_resched() when PREEMPT_VOLUNTARY is on, and how horrid that is for register allocation. And in bh_submit_read() we have another ugly thing: mov (%rdi),%rax test $0x4,%al je push %rbx mov %rdi,%rbx testb $0x1,(%rdi) where we have a mix of those two kinds of "test_bit()" (and test "testb" version most definitely looks better. But that's due to the source code being BUG_ON(!buffer_locked(bh)); if (buffer_uptodate(bh)) { ie we have that *ancient* BUG_ON() messing things up. Oh well. None of the buffer-head code matters any more, bit it's certainly showing the effects of that patch of yours, and the code isn't pretty. But none of the ugliness I found was actually _due_ to your patch. It was all due to other things, and your patch just makes code generation better in the cases I looked at. Linus