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Fri, 26 Aug 2022 16:31:19 -0700 (PDT) Received: from mobilestation ([95.79.140.178]) by smtp.gmail.com with ESMTPSA id o21-20020a05651205d500b00492b7d7ee20sm508353lfo.87.2022.08.26.16.31.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 Aug 2022 16:31:18 -0700 (PDT) Date: Sat, 27 Aug 2022 02:31:16 +0300 From: Serge Semin To: Sudip Mukherjee Cc: Serge Semin , Mark Brown , Rob Herring , Krzysztof Kozlowski , greentime.hu@sifive.com, jude.onyenegecha@sifive.com, william.salmon@sifive.com, adnan.chowdhury@sifive.com, ben.dooks@sifive.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, jeegar.lakhani@sifive.com Subject: Re: [PATCH 11/11] spi: dw: initialize dwc-ssi-1.03a controller Message-ID: <20220826233116.uulisbo663cxiadt@mobilestation> References: <20220802175755.6530-1-sudip.mukherjee@sifive.com> <20220802175755.6530-12-sudip.mukherjee@sifive.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220802175755.6530-12-sudip.mukherjee@sifive.com> X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Aug 02, 2022 at 06:57:55PM +0100, Sudip Mukherjee wrote: > Define the initialization of dwc-ssi-1.03a controller and mark it with > the capability of enhanced SPI supporting dual/quad/octal modes of > transfer. > > Signed-off-by: Sudip Mukherjee > --- > drivers/spi/spi-dw-mmio.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c > index 26c40ea6dd12..db80e0645172 100644 > --- a/drivers/spi/spi-dw-mmio.c > +++ b/drivers/spi/spi-dw-mmio.c > @@ -237,6 +237,15 @@ static int dw_spi_canaan_k210_init(struct platform_device *pdev, > return 0; > } > > +static int dw_spi_hssi_ext_init(struct platform_device *pdev, > + struct dw_spi_mmio *dwsmmio) > +{ > + dwsmmio->dws.ip = DW_HSSI_ID; > + dwsmmio->dws.caps = DW_SPI_CAP_EXT_SPI; The eSPI capability shall be auto-detectable by checking whether the CTRLR0.SPI_FRF field is writable. If it is then you'll need to check whether the clock stretching is also available by setting to the SPI_CTRLR0.CLK_STRETCH_EN flag. After that you can set the capability flag. Since the auto-detection procedure is available you won't need the dw_spi_hssi_ext_init() method here. So just drop it and use dw_spi_hssi_init() for the platform-specific initialization. Note it will also check the DMA-capability for you. > + > + return 0; > +} > + > static int dw_spi_mmio_probe(struct platform_device *pdev) > { > int (*init_func)(struct platform_device *pdev, > @@ -352,6 +361,7 @@ static const struct of_device_id dw_spi_mmio_of_match[] = { > { .compatible = "intel,thunderbay-ssi", .data = dw_spi_intel_init}, > { .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init}, > { .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init}, > + { .compatible = "snps,dwc-ssi-1.03a", dw_spi_hssi_ext_init}, Add "snps,dw-ahb-ssi" with the generic dw_spi_hssi_init() init method. -Sergey > { /* end of table */} > }; > MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match); > -- > 2.30.2 >