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From:   Zong Li <zong.li@sifive.com>
To:     robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
        palmer@dabbelt.com, paul.walmsley@sifive.com,
        aou@eecs.berkeley.edu, greentime.hu@sifive.com,
        conor.dooley@microchip.com, devicetree@vger.kernel.org,
        linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Cc:     Zong Li <zong.li@sifive.com>
Subject: [PATCH 0/3] Rename sifive L2 cache to sifive CCACHE
Date:   Mon, 29 Aug 2022 06:21:59 +0000
Message-Id: <20220829062202.3287-1-zong.li@sifive.com>
Precedence: bulk

Since composible cache may be L3 cache if private L2 cache exists, we
should use its original name "composible cache" to prevent confusion.

This patchset contains the modification which is related to ccache, such
as DT binding and EDAC driver.

Greentime Hu (1):
  soc: sifive: l2 cache: Rename SiFive L2 cache to composible cache.

Zong Li (2):
  dt-bindings: sifive-ccache: rename SiFive L2 cache to composible cache
  EDAC/sifive: use sifive_ccache instead of sifive_l2

 ...ifive-l2-cache.yaml => sifive-ccache.yaml} |   6 +-
 drivers/edac/Kconfig                          |   2 +-
 drivers/edac/sifive_edac.c                    |  12 +-
 drivers/soc/sifive/Kconfig                    |   7 +-
 drivers/soc/sifive/Makefile                   |   2 +-
 drivers/soc/sifive/sifive_ccache.c            | 221 ++++++++++++++++
 drivers/soc/sifive/sifive_l2_cache.c          | 237 ------------------
 include/soc/sifive/sifive_ccache.h            |  16 ++
 include/soc/sifive/sifive_l2_cache.h          |  16 --
 9 files changed, 253 insertions(+), 266 deletions(-)
 rename Documentation/devicetree/bindings/riscv/{sifive-l2-cache.yaml => sifive-ccache.yaml} (92%)
 create mode 100644 drivers/soc/sifive/sifive_ccache.c
 delete mode 100644 drivers/soc/sifive/sifive_l2_cache.c
 create mode 100644 include/soc/sifive/sifive_ccache.h
 delete mode 100644 include/soc/sifive/sifive_l2_cache.h

-- 
2.17.1